Searched hist:2706 (Results 1 - 25 of 41) sorted by relevance
/gem5/src/arch/mips/isa/formats/ | ||
H A D | formats.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | tlbop.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | util.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | unimp.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | noop.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | trap.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | unknown.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | control.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | mt.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | branch.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | int.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | basic.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | fp.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
/gem5/src/cpu/ | ||
H A D | StaticInstFlags.py | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/arm/isa/insts/ | ||
H A D | fp64.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
H A D | neon64.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/mips/isa/ | ||
H A D | bitfields.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | includes.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | operands.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
H A D | base.isa | diff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff |
/gem5/src/arch/alpha/ | ||
H A D | faults.hh | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/alpha/isa/ | ||
H A D | fp.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/arm/isa/templates/ | ||
H A D | pred.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
H A D | mem.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/sparc/isa/ | ||
H A D | base.isa | diff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers Reiley's update :) of the isa parser definitions. My addition of the vector element operand concept for the ISA parser. Nathanael's modification creating a hierarchy between vector registers and its constituencies to the isa parser. Some fixes/updates on top to consider instructions as vectors instead of floating when they use the VectorRF. Some counters added to all the models to keep faithful counts. Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2706 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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