Searched hist:2706 (Results 1 - 25 of 41) sorted by relevance

12

/gem5/src/arch/mips/isa/formats/
H A Dformats.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dtlbop.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dutil.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dunimp.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dnoop.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dtrap.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dunknown.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dcontrol.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dmt.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dbranch.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dint.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dbasic.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dfp.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
/gem5/src/cpu/
H A DStaticInstFlags.pydiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/arm/isa/insts/
H A Dfp64.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Dneon64.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/mips/isa/
H A Dbitfields.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dincludes.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Doperands.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
H A Dbase.isadiff 2706:d88c27f75121 Fri Jun 09 18:19:00 EDT 2006 Korey Sewell <ksewell@umich.edu> Authorship stuff
/gem5/src/arch/alpha/
H A Dfaults.hhdiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/alpha/isa/
H A Dfp.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/arm/isa/templates/
H A Dpred.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Dmem.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/sparc/isa/
H A Dbase.isadiff 12110:c24ee249b8ba Wed Apr 05 14:24:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: ISA parser additions of vector registers

Reiley's update :) of the isa parser definitions. My addition of the
vector element operand concept for the ISA parser. Nathanael's modification
creating a hierarchy between vector registers and its constituencies to the
isa parser.

Some fixes/updates on top to consider instructions as vectors instead of
floating when they use the VectorRF. Some counters added to all the
models to keep faithful counts.

Change-Id: Id8f162a525240dfd7ba884c5a4d9fa69f4050101
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2706
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

Completed in 130 milliseconds

12