12100SN/A// -*- mode:c++ -*- 22100SN/A 35268Sksewell@umich.edu// Copyright (c) 2003-2005 The Regents of The University of Michigan 45268Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc. 55268Sksewell@umich.edu// All rights reserved. 65268Sksewell@umich.edu// 75268Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 85268Sksewell@umich.edu// modification, are permitted provided that the following conditions are 95268Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 105268Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 115268Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 125268Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 135268Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 145268Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 155268Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 165268Sksewell@umich.edu// this software without specific prior written permission. 175268Sksewell@umich.edu// 185268Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 195268Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 205268Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 215268Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 225268Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 235268Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 245268Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 255268Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 265268Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 275268Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 285268Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 295268Sksewell@umich.edu// 305268Sksewell@umich.edu// Authors: Steve Reinhardt 315268Sksewell@umich.edu// Korey Sewell 322706Sksewell@umich.edu 332100SN/Alet {{ 342124SN/Adef LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 352124SN/A postacc_code = '', base_class = 'Memory', 362124SN/A decode_template = BasicDecode, exec_template_base = ''): 372124SN/A # Make sure flags are in lists (convert to lists if not). 382124SN/A mem_flags = makeList(mem_flags) 392124SN/A inst_flags = makeList(inst_flags) 402124SN/A 412124SN/A # Some CPU models execute the memory operation as an atomic unit, 422124SN/A # while others want to separate them into an effective address 432124SN/A # computation and a memory access operation. As a result, we need 442124SN/A # to generate three StaticInst objects. Note that the latter two 452124SN/A # are nested inside the larger "atomic" one. 462124SN/A 473953Sstever@eecs.umich.edu # Generate InstObjParams for each of the three objects. Note that 483953Sstever@eecs.umich.edu # they differ only in the set of code objects contained (which in 493953Sstever@eecs.umich.edu # turn affects the object's overall operand list). 503953Sstever@eecs.umich.edu iop = InstObjParams(name, Name, base_class, 513953Sstever@eecs.umich.edu { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code }, 523953Sstever@eecs.umich.edu inst_flags) 532124SN/A 542124SN/A if mem_flags: 555736Snate@binkert.org mem_flags = [ 'Request::%s' % flag for flag in mem_flags ] 565745Snate@binkert.org s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';' 572124SN/A iop.constructor += s 582124SN/A 592124SN/A # select templates 602935Sksewell@umich.edu 614056Sstever@eecs.umich.edu # The InitiateAcc template is the same for StoreCond templates as the 624056Sstever@eecs.umich.edu # corresponding Store template.. 632935Sksewell@umich.edu StoreCondInitiateAcc = StoreInitiateAcc 642935Sksewell@umich.edu 652124SN/A fullExecTemplate = eval(exec_template_base + 'Execute') 662124SN/A initiateAccTemplate = eval(exec_template_base + 'InitiateAcc') 672124SN/A completeAccTemplate = eval(exec_template_base + 'CompleteAcc') 682124SN/A 692124SN/A # (header_output, decoder_output, decode_block, exec_output) 703953Sstever@eecs.umich.edu return (LoadStoreDeclare.subst(iop), 716207Sksewell@umich.edu LoadStoreConstructor.subst(iop), 722124SN/A decode_template.subst(iop), 736207Sksewell@umich.edu fullExecTemplate.subst(iop) 743953Sstever@eecs.umich.edu + initiateAccTemplate.subst(iop) 756207Sksewell@umich.edu + completeAccTemplate.subst(iop)) 762100SN/A}}; 773953Sstever@eecs.umich.edu 782686Sksewell@umich.eduoutput header {{ 792686Sksewell@umich.edu std::string inst2string(MachInst machInst); 802686Sksewell@umich.edu}}; 812124SN/A 822686Sksewell@umich.eduoutput decoder {{ 832686Sksewell@umich.edu 842686Sksewell@umich.edustd::string inst2string(MachInst machInst) 852686Sksewell@umich.edu{ 864661Sksewell@umich.edu string str = ""; 872686Sksewell@umich.edu uint32_t mask = 0x80000000; 882686Sksewell@umich.edu 892686Sksewell@umich.edu for(int i=0; i < 32; i++) { 902686Sksewell@umich.edu if ((machInst & mask) == 0) { 912686Sksewell@umich.edu str += "0"; 922686Sksewell@umich.edu } else { 932686Sksewell@umich.edu str += "1"; 942686Sksewell@umich.edu } 952686Sksewell@umich.edu 962686Sksewell@umich.edu mask = mask >> 1; 972686Sksewell@umich.edu } 982686Sksewell@umich.edu 992686Sksewell@umich.edu return str; 1002686Sksewell@umich.edu} 1012686Sksewell@umich.edu 1022686Sksewell@umich.edu}}; 103