Searched hist:2012 (Results 426 - 450 of 1124) sorted by relevance

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/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/
H A Dhorizontal_addition.pydiff 9009:d45a02bd5391 Sat May 19 07:32:00 EDT 2012 Marc Orr <marc.orr@gmail.com> x86 ISA: Implement the sse3 haddps instruction.

Shuffle the 32 bit values into position, and then add in parallel.
/gem5/src/arch/x86/isa/insts/x87/transcendental_functions/
H A Dtrigonometric_functions.pydiff 9371:7c1484cc9b10 Sun Dec 30 01:45:00 EST 2012 Nilay Vaish <nilay@cs.wisc.edu> x86: implement x87 fp instruction fsincos
This patch implements the fsincos instruction. The code was originally written
by Vince Weaver. Gabe had made some comments about the code, but those were
never addressed. This patch addresses those comments.
/gem5/src/arch/x86/
H A Dx86_traits.hhdiff 9211:46c3a74952ec Tue Sep 11 10:25:00 EDT 2012 Nilay Vaish <nilay@cs.wisc.edu> x86: Add a separate register for D flag bit
The D flag bit is part of the cc flag bit register currently. But since it
is not being used any where in the implementation, it creates an unnecessary
dependency. Hence, it is being moved to a separate register.
diff 9057:f5ee56466b91 Tue Jun 05 13:52:00 EDT 2012 Ali Saidi <Ali.Saidi@ARM.com> ISA: Back-out NoopMachInst as a StaticInstPtr change.
diff 9040:cdfe09f9bdee Mon Jun 04 13:57:00 EDT 2012 Gabe Black <gblack@eecs.umich.edu> ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.

This eliminates a use of the ExtMachInst type outside of the ISAs.
diff 9010:7891b96e1526 Tue May 22 12:29:00 EDT 2012 Nilay Vaish <nilay@cs.wisc.edu> X86: Split Condition Code register
This patch moves the ECF and EZF bits to individual registers (ecfBit and
ezfBit) and the CF and OF bits to cfofFlag registers. This is being done
so as to lower the read after write dependencies on the the condition code
register. Ultimately we will have the following registers [ZAPS], [OF],
[CF], [ECF], [EZF] and [DF]. Note that this is only one part of the
solution for lowering the dependencies. The other part will check whether
or not the condition code register needs to be actually read. This would
be done through a separate patch.
/gem5/src/base/
H A Dstl_helpers.hhdiff 8737:770ccf3af571 Tue Jan 31 00:05:00 EST 2012 Koan-Sin Tan <koansin.tan@gmail.com> clang: Enable compiling gem5 using clang 2.9 and 3.0

This patch adds the necessary flags to the SConstruct and SConscript
files for compiling using clang 2.9 and later (on Ubuntu et al and OSX
XCode 4.2), and also cleans up a bunch of compiler warnings found by
clang. Most of the warnings are related to hidden virtual functions,
comparisons with unsigneds >= 0, and if-statements with empty
bodies. A number of mismatches between struct and class are also
fixed. clang 2.8 is not working as it has problems with class names
that occur in multiple namespaces (e.g. Statistics in
kernel_stats.hh).

clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which
causes confusion between the container std::set and the function
Packet::set, and this is currently addressed by not including the
entire namespace std, but rather selecting e.g. "using std::vector" in
the appropriate places.
/gem5/src/cpu/testers/rubytest/
H A DCheckTable.hhdiff 8932:1b2c17565ac8 Fri Apr 06 16:47:00 EDT 2012 Brad Beckmann <Brad.Beckmann@amd.com> rubytest: seperated read and write ports.

This patch allows the ruby tester to support protocols where the i-cache and d-cache
are managed by seperate controllers.
/gem5/src/mem/slicc/ast/
H A DStateDeclAST.pydiff 9298:9a087e046c58 Mon Oct 15 18:27:00 EDT 2012 Nilay Vaish <nilay@cs.wisc.edu> ruby: allow function definition in slicc structs
This patch adds support for function definitions to appear in slicc structs.
This is required for supporting functional accesses for different types of
messages. Subsequent patches will use this to development.
/gem5/src/mem/slicc/symbols/
H A DVar.pydiff 9219:258753d3bc47 Wed Sep 12 15:52:00 EDT 2012 Jason Power <power.jg@gmail.com> Ruby: Modify Scons so that we can put .sm files in extras
Also allows for header files which are required in slicc generated
code to be in a directory other than src/mem/ruby/slicc_interface.
/gem5/src/mem/ruby/network/fault_model/
H A DFaultModel.pydiff 9338:97b4a2be1e5b Fri Nov 02 12:32:00 EDT 2012 Andreas Sandberg <Andreas.Sandberg@arm.com> sim: Include object header files in SWIG interfaces

When casting objects in the generated SWIG interfaces, SWIG uses
classical C-style casts ( (Foo *)bar; ). In some cases, this can
degenerate into the equivalent of a reinterpret_cast (mainly if only a
forward declaration of the type is available). This usually works for
most compilers, but it is known to break if multiple inheritance is
used anywhere in the object hierarchy.

This patch introduces the cxx_header attribute to Python SimObject
definitions, which should be used to specify a header to include in
the SWIG interface. The header should include the declaration of the
wrapped object. We currently don't enforce header the use of the
header attribute, but a warning will be generated for objects that do
not use it.
/gem5/tests/quick/se/70.tgen/
H A Dtgen-simple-mem.cfg9242:256143419b40 Fri Sep 21 11:48:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> TrafficGen: Add a basic traffic generator regression

This patch adds a basic regression for the traffic generator. The
regression also serves as an example of the file formats used. More
complex regressions that make use of a DRAM controller model will
follow shortly.
/gem5/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/
H A Dsimerr8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/
H A Dsystem.terminal8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/
H A Dsystem.terminal8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/
H A Dsystem.terminal8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/
H A Dsystem.terminal8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/
H A Dsimerr8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/src/arch/mips/
H A Dvtophys.ccdiff 8799:dac1e33e07b0 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> Merge with the main repo.
/gem5/tests/long/se/10.mcf/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/se/20.parser/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/se/50.vortex/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/se/30.eon/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/se/60.bzip2/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/quick/se/02.insttest/
H A Dtest.py8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/
H A Dconfig.inidiff 9055:38f1926fb599 Tue Jun 05 01:23:00 EDT 2012 Ali Saidi <saidi@eecs.umich.edu> all: Update stats for memory per master and total fix.
diff 8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
diff 8835:7c68f84d7c4e Sun Feb 12 17:07:00 EST 2012 Ali Saidi <Ali.Saidi@ARM.com> stats: update stats for insts/ops and master id changes
8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
H A Dsimoutdiff 9055:38f1926fb599 Tue Jun 05 01:23:00 EDT 2012 Ali Saidi <saidi@eecs.umich.edu> all: Update stats for memory per master and total fix.
diff 8983:8800b05e1cb3 Wed May 09 14:52:00 EDT 2012 Nathan Binkert <nate@binkert.org> stats: update stats for no_value -> nan
Lots of accumulated older changes too.
diff 8835:7c68f84d7c4e Sun Feb 12 17:07:00 EST 2012 Ali Saidi <Ali.Saidi@ARM.com> stats: update stats for insts/ops and master id changes
8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.
/gem5/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/
H A Dsimerr8802:ef66a9083bc4 Sat Jan 28 10:24:00 EST 2012 Gabe Black <gblack@eecs.umich.edu> SE/FS: Make both SE and FS tests available all the time.

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