Searched hist:2010 (Results 501 - 525 of 929) sorted by relevance
| /gem5/src/mem/ruby/ | ||
| H A D | SConscript | diff 7768:cdb18c1b51ea Fri Nov 19 19:00:00 EST 2010 Ali Saidi <Ali.Saidi@ARM.com> SCons: Support building without an ISA diff 6882:898047a3672c Fri Jan 29 23:29:00 EST 2010 Brad Beckmann <Brad.Beckmann@amd.com> ruby: Ruby changes required to use the python config system This patch includes the necessary changes to connect ruby objects using the python configuration system. Mainly it consists of removing unnecessary ruby object pointers and connecting the necessary object pointers using the generated param objects. This patch includes the slicc changes necessary to connect generated ruby objects together using the python configuraiton system. diff 6876:a658c315512c Fri Jan 29 23:29:00 EST 2010 Steve Reinhardt <steve.reinhardt@amd.com> ruby: Convert most Ruby objects to M5 SimObjects. The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code. |
| /gem5/src/mem/slicc/ast/ | ||
| H A D | IfStatementAST.py | diff 6999:f226c098c393 Wed Mar 10 19:22:00 EST 2010 Nathan Binkert <nate@binkert.org> slicc: have a central mechanism for creating a code_formatter. This makes it easier to add global variables like protocol |
| H A D | ActionDeclAST.py | diff 6999:f226c098c393 Wed Mar 10 19:22:00 EST 2010 Nathan Binkert <nate@binkert.org> slicc: have a central mechanism for creating a code_formatter. This makes it easier to add global variables like protocol |
| /gem5/src/arch/sparc/isa/ | ||
| H A D | bitfields.isa | diff 7799:5d0f62927d75 Mon Dec 20 16:24:00 EST 2010 Gabe Black <gblack@eecs.umich.edu> Style: Replace some tabs with spaces. |
| /gem5/src/arch/sparc/isa/formats/mem/ | ||
| H A D | mem.isa | diff 7741:340b6f01d69b Thu Nov 11 05:03:00 EST 2010 Gabe Black <gblack@eecs.umich.edu> SPARC: Clean up some historical style issues. |
| /gem5/src/arch/x86/isa/ | ||
| H A D | main.isa | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| H A D | bitfields.isa | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/src/arch/x86/isa/microops/ | ||
| H A D | microops.isa | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/src/mem/ruby/network/ | ||
| H A D | SConscript | diff 6876:a658c315512c Fri Jan 29 23:29:00 EST 2010 Steve Reinhardt <steve.reinhardt@amd.com> ruby: Convert most Ruby objects to M5 SimObjects. The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code. |
| /gem5/src/mem/ruby/common/ | ||
| H A D | DataBlock.cc | diff 7039:bc0b6ea676b5 Mon Mar 22 21:43:00 EDT 2010 Nathan Binkert <nate@binkert.org> ruby: style pass |
| /gem5/src/base/ | ||
| H A D | cp_annotate.hh | diff 7492:acc1fbbef239 Tue Jul 06 00:39:00 EDT 2010 Steve Reinhardt <steve.reinhardt@amd.com> sim: fold StartupCallback into SimObject There used to be a reason to have StartupCallback be a separate object, but not any more. Now it's just confusing. |
| H A D | intmath.hh | diff 7584:28ddf6d9e982 Mon Aug 23 12:18:00 EDT 2010 Ali Saidi <Ali.Saidi@arm.com> ARM: Add I/O devices for booting linux |
| /gem5/src/arch/x86/linux/ | ||
| H A D | linux.cc | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/src/arch/mips/linux/ | ||
| H A D | system.cc | diff 7064:586b0e3a12b3 Thu Apr 15 19:24:00 EDT 2010 Nathan Binkert <nate@binkert.org> tick: rename Clock namespace to SimClock |
| /gem5/src/arch/sparc/ | ||
| H A D | pagetable.cc | diff 7741:340b6f01d69b Thu Nov 11 05:03:00 EST 2010 Gabe Black <gblack@eecs.umich.edu> SPARC: Clean up some historical style issues. |
| /gem5/src/arch/x86/ | ||
| H A D | pagetable.cc | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| H A D | emulenv.cc | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/src/mem/ruby/network/simple/ | ||
| H A D | Switch.cc | diff 7454:3a3e8e8cce1b Fri Jun 11 02:17:00 EDT 2010 Nathan Binkert <nate@binkert.org> ruby: get rid of Vector and use STL add a couple of helper functions to base for deleteing all pointers in a container and outputting containers to a stream diff 7055:4e24742201d7 Fri Apr 02 14:20:00 EDT 2010 Nathan Binkert <nate@binkert.org> ruby: get "using namespace" out of headers In addition to obvious changes, this required a slight change to the slicc grammar to allow types with :: in them. Otherwise slicc barfs on std::string which we need for the headers that slicc generates. diff 7054:7d6862b80049 Wed Mar 31 19:56:00 EDT 2010 Nathan Binkert <nate@binkert.org> style: another ruby style pass diff 7002:48a19d52d939 Wed Mar 10 21:33:00 EST 2010 Nathan Binkert <nate@binkert.org> ruby: get rid of std-includes.hh Do not use "using namespace std;" in headers Include header files as needed |
| /gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/ | ||
| H A D | stack_operations.py | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/src/arch/arm/linux/ | ||
| H A D | process.hh | diff 7096:e81026b9dfe0 Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Allow ARM processes to start in Thumb mode. |
| /gem5/src/arch/x86/isa/decoder/ | ||
| H A D | decoder.isa | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| /gem5/util/m5/ | ||
| H A D | m5op_arm.S | 7732:a2c660de7787 Mon Nov 08 14:58:00 EST 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add support for M5 ops in the ARM ISA |
| /gem5/src/arch/x86/isa/formats/ | ||
| H A D | syscall.isa | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
| H A D | nop.isa | 7715:5581d0cd2bdb Fri Oct 22 03:24:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> X86: Make nop a regular, non-microcoded instruction. Code in the CPUs that need a nop to carry a fault can't easily deal with a microcoded nop. This instruction format provides for one that isn't. |
| /gem5/src/arch/x86/isa/insts/general_purpose/ | ||
| H A D | semaphores.py | diff 7087:fb8d5786ff30 Mon May 24 01:44:00 EDT 2010 Nathan Binkert <nate@binkert.org> copyright: Change HP copyright on x86 code to be more friendly |
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