Searched hist:2009 (Results 201 - 225 of 951) sorted by relevance

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/gem5/src/arch/x86/isa/insts/general_purpose/
H A Dsemaphores.pydiff 6512:b19a86a6d424 Mon Aug 17 21:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Turn the CMPXCHG8B microcode into a template and generate each variant.
diff 6486:33faa9915d16 Sun Aug 09 04:01:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
diff 6097:842991b33990 Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of XADD.
diff 6094:28198ab3adec Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of CMPXCHG.
diff 5815:18ed7aa8e8e1 Sun Jan 25 23:33:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the xadd instruction.
/gem5/src/arch/x86/insts/
H A Dmicromediaop.hhdiff 6801:353726c415f4 Sat Dec 19 04:48:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a common named flag for signed media operations.
diff 6800:335f8b406bb9 Sat Dec 19 04:48:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Create a common flag with a name to indicate high multiplies.
diff 6799:36131e4dfb6e Sat Dec 19 04:47:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Create a common flag with a name to indicate scalar media instructions.
diff 6545:9c68aea7b1e6 Mon Aug 17 21:27:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Rename sel to ext for media microops.
6515:a785733109e7 Mon Aug 17 21:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Create base classes for use with media/SIMD microops.
/gem5/src/python/m5/
H A Dtrace.pydiff 6654:4c84e771cca7 Tue Sep 22 18:24:00 EDT 2009 Nathan Binkert <nate@binkert.org> python: Move more code into m5.util allow SCons to use that code.
Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.
diff 5879:e9f9c0f7e5f0 Wed Feb 18 13:00:00 EST 2009 Nathan Binkert <nate@binkert.org> events: Make trace events happen at the right priority.
Also, while we're at it, remember that priorities are in the Event class
and add a disable method to disable tracing.
diff 5873:67a6ea624776 Sun Feb 15 23:39:00 EST 2009 Nathan Binkert <nate@binkert.org> traceflags: fix --trace-help
diff 5860:68c52fee5a53 Wed Feb 04 19:26:00 EST 2009 Nathan Binkert <nate@binkert.org> some new files are missing copyright notices
5799:0af61da2b66a Mon Jan 19 12:59:00 EST 2009 Nathan Binkert <nate@binkert.org> tracing: panic() if people try to use tracing, but TRACING_ON is not set.
Also clean things up so that help strings can more easily be added.
Move the help function into trace.py
/gem5/src/base/stats/
H A Dinfo.hhdiff 6212:64c3b989238c Wed May 13 10:18:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: fancy is a bad name
diff 6172:278d0e37eba2 Mon May 11 14:18:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: remove a few compat leftovers
diff 6169:8ba6a73c8a45 Mon May 11 14:18:00 EDT 2009 Nathan Binkert <nate@binkert.org> scons: add include guards to info.hh
diff 6130:0fb959250892 Wed Apr 22 16:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: Move flags into info.hh and use base/flags.hh to manage the flags
6129:05405c5b8c16 Wed Apr 22 16:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> stats: Shuffle around info stuff so it can be accessed separately
/gem5/src/mem/ruby/network/simple/
H A DSConscriptdiff 6286:40b142645016 Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> scons: update SCons files for changes in ruby.
diff 6168:ba6fe02228db Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: add RUBY sticky option that must be set to add ruby to the build
Default is false
6157:eaf2fd8f54c0 Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Migrate all of ruby and slicc to SCons.
Add the PROTOCOL sticky option sets the coherence protocol that slicc
will parse and therefore ruby will use. This whole process was made
difficult by the fact that the set of files that are output by slicc
are not easily known ahead of time. The easiest thing wound up being
to write a parser for slicc that would tell me. Incidentally this
means we now have a slicc grammar written in python.
/gem5/src/mem/ruby/profiler/
H A DStoreTrace.hhdiff 6372:f1a41ea3bbab Sat Jul 18 19:20:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed all refs to old RubyConfig
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
H A DStoreTrace.ccdiff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
diff 6149:ff34514cbf37 Mon May 11 13:38:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: Renamed Ruby's EventQueue to RubyEventQueue
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/mem/ruby/common/
H A DSubBlock.ccdiff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/kern/
H A Doperatingsystem.hhdiff 6672:b636411c118e Fri Oct 02 04:32:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> SE mode: Make the direction anonymous mmaps move through memory configurable.
diff 6215:9aed64c9f10f Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: use base/types.hh not inttypes.h or stdint.h
diff 5795:72ce7502dc71 Sat Jan 17 18:56:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> Fix issue 326: glibc non-deterministic because it reads /proc
/gem5/src/arch/arm/isa/formats/
H A Dmem.isadiff 6307:067515d22824 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Improve memory instruction disassembly.
diff 6305:e518d78b2ed1 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Get rid of the MemAcc and EAComp static insts.
diff 6303:cb190056165e Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add an AddrMode2 format for memory instructions that use address mode 2.
diff 6302:cc0c9db8ca55 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Don't always update CPSR.
diff 6301:719e56579870 Thu Jul 09 02:02:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add an AddrMode3 format for memory instructions that use address mode 3.
diff 6253:988a001820f8 Sun Jun 21 20:21:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Simplify the ISA desc by pulling some classes out of it.
diff 6250:1cc6e860d95f Sun Jun 21 19:41:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Don't downconvert ExtMachInsts to MachInsts.
diff 6245:f8692407cc23 Sun Jun 21 12:41:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Get rid of unnecessary fp_enable_checks.
diff 6243:3a1698fbbc9f Sun Jun 21 12:37:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make the isa parser aware that CPSR is being used.
diff 6242:1cee707c1228 Sun Jun 21 12:21:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Pull some static code out of the isa desc and create miscregs.hh.
/gem5/src/mem/ruby/slicc_interface/
H A DSConscriptdiff 6785:bb675ba62c79 Wed Nov 18 19:34:00 EST 2009 Brad Beckmann <Brad.Beckmann@amd.com> ruby: returns the number of LLC needed for broadcast
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast protocols such as MOESI_hammer.
diff 6286:40b142645016 Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> scons: update SCons files for changes in ruby.
diff 6168:ba6fe02228db Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: add RUBY sticky option that must be set to add ruby to the build
Default is false
6157:eaf2fd8f54c0 Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Migrate all of ruby and slicc to SCons.
Add the PROTOCOL sticky option sets the coherence protocol that slicc
will parse and therefore ruby will use. This whole process was made
difficult by the fact that the set of files that are output by slicc
are not easily known ahead of time. The easiest thing wound up being
to write a parser for slicc that would tell me. Incidentally this
means we now have a slicc grammar written in python.
/gem5/src/mem/slicc/ast/
H A DOutPortDeclAST.py6657:ef5fae93a3b2 Tue Sep 22 21:12:00 EDT 2009 Nathan Binkert <nate@binkert.org> slicc: Pure python implementation of slicc.
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".

Slicc can easily be run manually by using util/slicc
/gem5/ext/ply/example/optcalc/
H A DREADMEdiff 6498:e21e9ab5fad0 Sun Aug 16 16:39:00 EDT 2009 Nathan Binkert <nate@binkert.org> ply: update PLY to version 3.2
/gem5/ext/ply/test/
H A Dtestlex.pydiff 6498:e21e9ab5fad0 Sun Aug 16 16:39:00 EDT 2009 Nathan Binkert <nate@binkert.org> ply: update PLY to version 3.2
H A Dtestyacc.pydiff 6498:e21e9ab5fad0 Sun Aug 16 16:39:00 EDT 2009 Nathan Binkert <nate@binkert.org> ply: update PLY to version 3.2
/gem5/src/arch/arm/
H A DArmInterrupts.py6757:d86d3d6e5326 Tue Nov 17 19:02:00 EST 2009 Ali Saidi <Ali.Saidi@ARM.com> ARM: Boilerplate full-system code.
/gem5/src/arch/mips/
H A Ddt_constants.hhdiff 6376:eaf61ef6a8f2 Mon Jul 20 23:14:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Use BitUnions instead of bits() functions and constants.
Also fix style issues in regions around these changes.
/gem5/src/arch/mips/linux/
H A Dsystem.hhdiff 5991:3ca926101a5c Thu Mar 05 20:15:00 EST 2009 Steve Reinhardt <steve.reinhardt@amd.com> Get rid of 'using namespace' declarations in headers.
/gem5/src/arch/power/isa/formats/
H A Dutil.isa6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
/gem5/src/arch/power/
H A Dmicrocode_rom.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
H A Dmiscregs.hh6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
/gem5/src/arch/x86/
H A DSConsoptsdiff 5864:780dd1bead5c Mon Feb 09 23:10:00 EST 2009 Nathan Binkert <nate@binkert.org> copyright: This file need not have had the more restrictive copyright.
H A Dcpuid.hhdiff 6215:9aed64c9f10f Sun May 17 17:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> includes: use base/types.hh not inttypes.h or stdint.h
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/
H A Dtranslate.pydiff 5927:5e3367b103da Wed Feb 25 13:20:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Do a merge for the zero extension microop.
/gem5/src/arch/x86/isa/insts/general_purpose/string/
H A Dload_string.pydiff 5846:66021eb985f5 Sun Feb 01 03:28:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix the microcode for the LODS instruction.

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