History log of /gem5/src/arch/x86/insts/micromediaop.hh
Revision Date Author Comments
# 13613:a19963be12ca 20-Nov-2018 Gabe Black <gabeblack@google.com>

x86: Stop using/defining some ISA specific register types.

These have been replaced with the generic RegVal type.

Change-Id: I75c1134212067dea43aa0903d813633e06f3d6c6
Reviewed-on: https://gem5-review.googlesource.com/c/14476
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>


# 13611:c8b7847b4171 19-Nov-2018 Gabe Black <gabeblack@google.com>

arch: cpu: Rename *FloatRegBits* to *FloatReg*.

Now that there's no plain FloatReg, there's no reason to distinguish
FloatRegBits with a special suffix since it's the only way to read or
write FP registers.

Change-Id: I3a60168c1d4302aed55223ea8e37b421f21efded
Reviewed-on: https://gem5-review.googlesource.com/c/14460
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>


# 12106:7784fac1b159 05-Apr-2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com>

cpu: Simplify the rename interface and use RegId

With the hierarchical RegId there are a lot of functions that are
redundant now.

The idea behind the simplification is that instead of having the regId,
telling which kind of register read/write/rename/lookup/etc. and then
the function panic_if'ing if the regId is not of the appropriate type,
we provide an interface that decides what kind of register to read
depending on the register type of the given regId.

Change-Id: I7d52e9e21fc01205ae365d86921a4ceb67a57178
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2702


# 12104:edd63f9c6184 05-Apr-2017 Nathanael Premillieu <nathanael.premillieu@arm.com>

arch, cpu: Architectural Register structural indexing

Replace the unified register mapping with a structure associating
a class and an index. It is now much easier to know which class of
register the index is referring to. Also, when adding a new class
there is no need to modify existing ones.

Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2700


# 11320:42ecb523c64a 06-Feb-2016 Steve Reinhardt <steve.reinhardt@amd.com>

style: remove trailing whitespace

Result of running 'hg m5style --skip-all --fix-white -a'.


# 7620:3d8a23caa1ef 23-Aug-2010 Gabe Black <gblack@eecs.umich.edu>

X86: Consolidate extra microop flags into one parameter.

This single parameter replaces the collection of bools that set up various
flavors of microops. A flag parameter also allows other flags to be set like
the serialize before/after flags, etc., without having to change the
constructor.


# 6801:353726c415f4 19-Dec-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Add a common named flag for signed media operations.


# 6800:335f8b406bb9 19-Dec-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Create a common flag with a name to indicate high multiplies.


# 6799:36131e4dfb6e 19-Dec-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Create a common flag with a name to indicate scalar media instructions.


# 6545:9c68aea7b1e6 17-Aug-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Rename sel to ext for media microops.


# 6515:a785733109e7 17-Aug-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Create base classes for use with media/SIMD microops.