Searched hist:2009 (Results 151 - 175 of 951) sorted by relevance

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/gem5/src/arch/x86/isa/insts/simd64/floating_point/arithmetic/
H A Dsubtraction.pydiff 6557:f677e05d723d Mon Aug 17 21:36:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the floating point media subtract instructions.
/gem5/src/arch/x86/isa/insts/simd64/floating_point/
H A Ddata_conversion.pydiff 6606:03fd282998d0 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media instructions that convert fp values to ints.
/gem5/src/arch/x86/isa/insts/simd64/integer/arithmetic/
H A Daverage.pydiff 6588:f449753172ee Mon Aug 17 23:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media average instructions.
H A Dsum_of_absolute_differences.pydiff 6582:7e1af04f4ead Mon Aug 17 23:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the sum of absolute differences instructions.
/gem5/src/arch/x86/isa/insts/simd64/integer/compare/
H A Dcompare_and_write_mask.pydiff 6567:819107c2c851 Mon Aug 17 23:04:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the instructions that compare fp values and write masks as the result.
/gem5/src/arch/x86/isa/insts/simd64/integer/
H A Ddata_conversion.pydiff 6563:2c5b80c75da7 Mon Aug 17 21:41:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media instructions that convert integer values to floating point.
/gem5/src/arch/x86/isa/insts/simd64/integer/data_reordering/
H A Dextract_and_insert.pydiff 6591:3d1ea9362fe5 Mon Aug 17 23:22:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the insert/extract instructions.
H A Dshuffle_and_swap.pydiff 6597:4903cea6a8c2 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the shuffle media instructions.
/gem5/src/arch/x86/isa/insts/simd64/integer/data_transfer/
H A Dmove_mask.pydiff 6593:f27fd3c3a153 Mon Aug 17 23:22:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the instructions that move sign bits.
/gem5/src/arch/x86/isa/insts/simd64/integer/logical/
H A Dexclusive_or.pydiff 6536:dc54f4fd6116 Mon Aug 17 21:23:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement PXOR.
H A Dpor.pydiff 6538:6cf5a0235ae8 Mon Aug 17 21:23:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement POR, ORPD and ORPS.
/gem5/src/arch/x86/isa/insts/simd64/integer/shift/
H A Dleft_logical_shift.pydiff 6584:5355f44912f6 Mon Aug 17 23:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media shifts that operate on 64 bits or less at a time.
H A Dright_arithmetic_shift.pydiff 6584:5355f44912f6 Mon Aug 17 23:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media shifts that operate on 64 bits or less at a time.
H A Dright_logical_shift.pydiff 6584:5355f44912f6 Mon Aug 17 23:15:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement the media shifts that operate on 64 bits or less at a time.
/gem5/src/arch/power/insts/
H A Dmem.cc6691:cd68b6ecd68d Tue Oct 27 12:24:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> POWER: Add support for the Power ISA

This adds support for the 32-bit, big endian Power ISA. This supports both
integer and floating point instructions based on the Power ISA Book I v2.06.
/gem5/src/arch/arm/
H A Dnativetrace.hhdiff 6419:2192dac4ad82 Wed Jul 29 03:17:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make the ARM native tracer stop M5 if control diverges.
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
diff 6398:7a94cba72e02 Mon Jul 27 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make native trace only print when registers are changing value.
When registers have incorrect values but aren't actively changing, it's likely
they're not being modified at all. The fact that they're still wrong isn't
very important.
6397:cb1d7c957f49 Mon Jul 27 03:51:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add a native tracer.
H A Dstacktrace.hhdiff 6757:d86d3d6e5326 Tue Nov 17 19:02:00 EST 2009 Ali Saidi <Ali.Saidi@ARM.com> ARM: Boilerplate full-system code.
diff 6658:f4de76601762 Wed Sep 23 11:34:00 EDT 2009 Nathan Binkert <nate@binkert.org> arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
6019:76890d8b28f5 Sun Apr 05 21:53:00 EDT 2009 Stephen Hines <hines@cs.fsu.edu> arm: add ARM support to M5
/gem5/src/arch/x86/isa/decoder/
H A Dtwo_byte_opcodes.isadiff 6707:0e5037cecaf7 Fri Oct 30 00:49:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> X86: Add support for x86 psrldq and pslldq instructions

These are complicated instructions and the micro-code might be suboptimal.

This has been tested with some small sample programs (attached)

The psrldq instruction is needed by various spec2k programs.
diff 6706:ea20065f6614 Fri Oct 30 15:52:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> X86: Implement movd_Vo_Edp on X86

This patch implements the movd_Vo_Edp series of instructions.

It addresses various concerns by Gabe Black about which file the
instruction belonged in, as well as supporting REX prefixed
instructions properly.

This instruction is needed for some of the spec2k benchmarks, most
notably bzip2.
diff 6705:3c810b64ee7d Fri Oct 30 14:19:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> X86: Implement the X86 sse2 haddpd instruction

This patch implements the haddpd instruction.

It fixes the problem in the previous version (pointed out by Gabe Black)
where an incorrect result would happen if you issue the instruction
with the same argument twice, i.e. "haddpd %xmm0,%xmm0"

This instruction is used by many spec2k benchmarks.
diff 6696:e533bec78924 Wed Oct 21 13:40:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> Implement X86 sse2 movdqu and movdqa instructions

The movdqa instruction should enforce 16-byte alignment.
This implementation does not do that.

These instructions are needed for most of x86_64 spec2k to run.
diff 6616:33837b097d69 Tue Aug 18 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Decode the immediate byte opcode extension for 3dNow! instructions.
diff 6615:f0e4e63310e5 Tue Aug 18 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Decode three byte opcodes.
diff 6611:2cd76560a1f1 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Double check the two byte portion of the decoder and fix bugs/clean up.
diff 6610:dbfe22c711d5 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement MOVNTI.
diff 6608:6d1f74b21533 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement MOVQ2DQ.
diff 6607:dba8e329e783 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement MOVDQ2Q.
/gem5/src/mem/ruby/common/
H A DSubBlock.hhdiff 6372:f1a41ea3bbab Sat Jul 18 19:20:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: removed all refs to old RubyConfig
diff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6204:b247610d8882 Wed May 13 01:33:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: remove random uint typedef and use unsigned
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
H A DDataBlock.hhdiff 6762:a22a47e60c21 Wed Nov 18 16:55:00 EST 2009 Brad Beckmann <Brad.Beckmann@amd.com> ruby: Ruby destruction fix.
diff 6631:5437a0eeb822 Fri Sep 11 11:59:00 EDT 2009 pdudnik@gmail.com Object print bug fix
diff 6369:82ac95f4d9f0 Sat Jul 18 18:40:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> merge
diff 6367:c4e91b8e3da3 Sat Jul 18 17:58:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> ruby: better debug print for DataBlock
diff 6355:79464d8a4d2f Mon Jul 13 18:22:00 EDT 2009 pdudnik@gmail.com 1. Got rid of unused functions in DirectoryMemory
2. Reintroduced RMW_Read and RMW_Write
3. Defined -2 in the Sequencer as well as made a note about mandatory queue

Did not address the issues in the slicc because remaking the atomics altogether to allow
multiple processors to issue atomic requests at once
diff 6351:31d19bdd9d85 Mon Jul 13 12:59:00 EDT 2009 pdudnik@gmail.com Minor fixes for compiling
diff 6347:a532849ca78f Mon Jul 13 12:13:00 EDT 2009 Polina pdudnik@gmail.com Reintegrated Derek's functional implementation of atomics with a minor change: don't clear lock on failure
diff 6285:ce086eca1ede Mon Jul 06 18:49:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import the latest ruby changes from gems.
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
diff 6154:6bb54dcb940e Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Make ruby #includes use full paths to the files they're including.
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
6145:15cca6ab723a Mon May 11 13:38:00 EDT 2009 Nathan Binkert <nate@binkert.org> ruby: Import ruby and slicc from GEMS

We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
/gem5/src/arch/arm/isa/
H A Dbitfields.isadiff 6759:98101a5f7ee4 Tue Nov 17 19:02:00 EST 2009 Ali Saidi <Ali.Saidi@ARM.com> ARM: Begin implementing CP15
diff 6749:ac658ad78659 Sat Nov 14 22:22:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add a bitfield to indicate if an immediate should be used.
diff 6743:f9e317156e45 Sat Nov 14 12:25:00 EST 2009 Ali Saidi <saidi@eecs.umich.edu> ARM: Move around decoder to properly decode CP15
diff 6741:73d89772f409 Wed Nov 11 02:44:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Fix some bugs in the ISA desc and fill out some instructions.
diff 6275:4a392427117d Thu Jul 02 01:16:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Get rid of some bitfields that aren't used. A few may need to be readded.
diff 6269:8be7583b271c Thu Jul 02 01:11:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Decode some media instructions. These are untested.
diff 6268:0f869e59c079 Thu Jul 02 01:11:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Use the new DataOp format to simplify the decoder.
diff 6267:f5edd0f709e4 Thu Jul 02 01:11:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Add in some new artificial fields that make decoding a little easier.
diff 6251:1d794d81a4e6 Sun Jun 21 19:41:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make inst bitfields accessible outside of the isa desc.
diff 6247:094b7ea0b180 Sun Jun 21 12:48:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Get rid of unnecessary Re operand.
/gem5/src/arch/x86/isa/microops/
H A Dmediaop.isadiff 6801:353726c415f4 Sat Dec 19 04:48:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Add a common named flag for signed media operations.
diff 6800:335f8b406bb9 Sat Dec 19 04:48:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Create a common flag with a name to indicate high multiplies.
diff 6799:36131e4dfb6e Sat Dec 19 04:47:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Create a common flag with a name to indicate scalar media instructions.
diff 6742:a2a79fe9655d Wed Nov 11 17:49:00 EST 2009 Vince Weaver <vince@csl.cornell.edu> X86: add ULL to 1's being shifted in 64-bit values

Some of the micro-ops weren't casting 1 to ULL before shifting,
which can cause problems. On the perl makerand input this
caused some values to be negative that shouldn't have been.

The casts are done as ULL(1) instead of 1ULL to match others
in the m5 code base.
diff 6732:4b93003bb069 Tue Nov 10 11:18:00 EST 2009 Vince Weaver <vince@csl.cornell.edu> X86: Remove double-cast in Cvtf2i micro-op

This double cast led to rounding errors which caused
some benchmarks to get the wrong values, most notably lucas
which failed spectacularly due to CVTTSD2SI returning an
off-by-one value. equake was also broken.
diff 6622:aff9a522956a Fri Aug 21 12:10:00 EDT 2009 Nathan Binkert <nate@binkert.org> X86: fix some simple compile issues
static should not be used for constants that are not inside a class definition.
diff 6605:e16cf917dcec Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a microop for converting fp values to ints.
diff 6603:b3333ef98685 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a microop that compares fp values and writes a mask as a result.
diff 6601:457527e517cc Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a microop that compares fp values and writes to rflags.
diff 6596:e60eaef99523 Mon Aug 17 23:25:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a shuffle media microop.
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/
H A Dinterrupts_and_exceptions.pydiff 6645:c248b0348d85 Wed Sep 16 22:28:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix checking the NT bit during an IRET.
diff 6344:b7104eda0795 Thu Jul 16 12:27:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix a number of places where the wrong form of a microop was used.
diff 6298:9af8736c26be Thu Jul 09 02:01:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.
diff 5932:afa0866171e1 Wed Feb 25 13:20:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Make the segment register reading microops use merge.
diff 5916:4bbd6239223c Wed Feb 25 13:18:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Update CS later so stack accesses have the right permission checks.
diff 5812:d12ff89c7692 Sun Jan 25 23:31:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> X86: Fix a bug in the iret microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/
H A Dbit_test.pydiff 6096:72f1239a1583 Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of BTC.
diff 6095:c36f932461d9 Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of BTR.
diff 6093:7b88298769c7 Sun Apr 19 07:56:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> X86: Implement a locking version of BTS.
/gem5/src/python/m5/util/
H A Dattrdict.pydiff 6653:9e27313312e6 Tue Sep 22 18:24:00 EDT 2009 Nathan Binkert <nate@binkert.org> multiattrdict: make multilevel nesting work properly
diff 6652:f24b06320444 Tue Sep 22 18:24:00 EDT 2009 Nathan Binkert <nate@binkert.org> attrdict: add pickle support to attrdict
diff 6278:47e757f289e0 Thu Jul 02 19:48:00 EDT 2009 Nathan Binkert <nate@binkert.org> attrdict: correct delattr

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