Searched hist:2008 (Results 26 - 50 of 494) sorted by relevance

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/gem5/src/cpu/o3/
H A Dthread_context.cc5597:e2983d751be4 Thu Oct 09 03:10:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> O3: Generaize the O3 IMPL class so it isn't split out by ISA.
/gem5/src/sim/
H A Dmicrocode_rom.hh5664:3b3756efad89 Sun Oct 12 18:59:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
/gem5/src/dev/x86/
H A Di8259.hhdiff 5688:e18928b6b108 Mon Oct 13 02:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make auto eoi mode work in the I8259 PIC.
diff 5686:f33045b4dbee Mon Oct 13 02:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the I8259 PIC accept a specific EOI command.
diff 5657:7539092b28ac Sun Oct 12 16:54:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a mechanism for the IO APIC to access I8259 vectors.
diff 5656:f548d22a2f71 Sun Oct 12 16:51:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Actually use the extra vector bits we get from ICW2.
diff 5654:340254de2031 Sun Oct 12 16:44:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC handle interrupt messages from the IO APIC.
diff 5651:7f0c8006c3d7 Sun Oct 12 16:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make APICs communicate through the memory system.
diff 5634:22553ec2f177 Sat Oct 11 04:45:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the CMOS and I8259 devices use IntDev and IntPin.
diff 5632:65132fd646c6 Sat Oct 11 04:31:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Hook the CMOS device to the I8259 PICs.
diff 5631:38912b6250d0 Sat Oct 11 04:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the I8259 decipher the commands it's given, and add some of it's registers.
5630:b49710ff49d3 Sat Oct 11 04:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the I8259 from a subdevice into a real SimObject.
H A Dpc.ccdiff 5654:340254de2031 Sun Oct 12 16:44:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC handle interrupt messages from the IO APIC.
diff 5643:2b1611137af4 Sat Oct 11 19:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create an IO APIC device.
diff 5638:dc073dc6358b Sat Oct 11 05:23:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Rename the PC device to Pc.
diff 5637:3d2451ebad92 Sat Oct 11 05:21:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bring the South Bridge device into dev/x86 and get rid of south_bridge directory.
diff 5636:27a9526eea1f Sat Oct 11 05:16:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change I8254 and PCSpeaker devices from subdevices to SimObjects and eliminate subdevices.
diff 5635:b65e232e7755 Sat Oct 11 04:49:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Devices: Make the Intel8254Timer device only use pointers to its counters.
diff 5478:ca055528a3b3 Tue Jun 17 23:29:00 EDT 2008 Nathan Binkert <nate@binkert.org> Rename SimConsole to Terminal since it makes more sense
diff 5446:23711deb13ac Thu Jun 12 00:56:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the platform object initialize channel 0 of the PIT.
5389:215d8a8c97df Tue Mar 25 02:06:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the Opteron platform to be the PC platform.
H A Di8259.ccdiff 5698:584248437e4f Fri Oct 17 01:22:00 EDT 2008 Nathan Binkert <nate@binkert.org> need to add packet_access.hh in order to get tempalte definition
diff 5688:e18928b6b108 Mon Oct 13 02:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make auto eoi mode work in the I8259 PIC.
diff 5687:cec3cfa0b6b5 Mon Oct 13 02:25:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make non-specific EOI commands work.
diff 5686:f33045b4dbee Mon Oct 13 02:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the I8259 PIC accept a specific EOI command.
diff 5657:7539092b28ac Sun Oct 12 16:54:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a mechanism for the IO APIC to access I8259 vectors.
diff 5656:f548d22a2f71 Sun Oct 12 16:51:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Actually use the extra vector bits we get from ICW2.
diff 5634:22553ec2f177 Sat Oct 11 04:45:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the CMOS and I8259 devices use IntDev and IntPin.
diff 5632:65132fd646c6 Sat Oct 11 04:31:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Hook the CMOS device to the I8259 PICs.
diff 5631:38912b6250d0 Sat Oct 11 04:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the I8259 decipher the commands it's given, and add some of it's registers.
5630:b49710ff49d3 Sat Oct 11 04:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the I8259 from a subdevice into a real SimObject.
H A DI8259.pydiff 5634:22553ec2f177 Sat Oct 11 04:45:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the CMOS and I8259 devices use IntDev and IntPin.
diff 5632:65132fd646c6 Sat Oct 11 04:31:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Hook the CMOS device to the I8259 PICs.
5630:b49710ff49d3 Sat Oct 11 04:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the I8259 from a subdevice into a real SimObject.
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/
H A Dxreturn.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5590:2ff5831fd2eb Thu Oct 09 03:04:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make far ret modify CS instead of some random selector.
diff 5433:1b0b8e9ba6a9 Thu Jun 12 00:52:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change how segment loading is performed.
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/
H A Dstring_io.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
diff 5418:501cb81c89df Thu Jun 12 00:47:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bypass unaligned access support for register addressed MSRs.
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/
H A Dascii_adjust.pydiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
H A Dbcd_adjust.pydiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
H A Dextract_sign_mask.pydiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
/gem5/src/arch/x86/isa/insts/general_purpose/flags/
H A Dset_and_clear.pydiff 5448:67c8b7badec1 Thu Jun 12 00:58:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement and hook up STI and CLI instructions.
H A Dpush_and_pop.pydiff 5432:e1e42f18d376 Thu Jun 12 00:51:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make pushes and pops use the stack size instead of the data size.
diff 5426:0bdcc60ccc45 Thu Jun 12 00:49:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Add microops and supporting code to manipulate the whole rflags register.
/gem5/src/arch/x86/isa/insts/general_purpose/
H A Dload_segment_registers.pydiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
/gem5/src/arch/x86/bios/
H A DIntelMP.pydiff 5770:03c07a62074f Sat Dec 06 17:48:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Add add_entry back in.
diff 5702:bf84e2fa05f7 Mon Oct 20 16:22:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.

Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.

Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
diff 5641:51b7b8cf8083 Sat Oct 11 18:14:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Add an Intel MP table to the simulation.
5625:ea7d3676ac8d Sat Oct 11 02:39:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the Intel MP tables.
H A Dacpi.cc5627:31eac202dbd1 Sat Oct 11 02:43:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
/gem5/src/base/
H A Datomicio.cc5548:19d45fa7315c Fri Sep 19 12:42:00 EDT 2008 Nathan Binkert <nate@binkert.org> atomicio: provide atomic read and write functions.

These functions keep trying to read and write until all data has been
transferred, or an error occurrs. In the case where an end of file
hasn't been reached, but all of the bytes have not been read/written,
try again. On EINTR, try again.
/gem5/src/arch/alpha/
H A Dipr.hhdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
H A Didle_event.ccdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5568:d14250d688d2 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Clean up namespace usage.
diff 5567:8fc3b004b0df Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> arch: TheISA shouldn't really ever be used in the arch directory.
We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.
/gem5/src/arch/x86/isa/insts/general_purpose/string/
H A Dmove_string.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
H A Dstore_string.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
/gem5/src/python/m5/
H A Doptions.pydiff 5586:d27058799d3a Mon Oct 06 12:31:00 EDT 2008 Nathan Binkert <nate@binkert.org> python: cleanup options parsing stuff so that it properly deals with defaults.
While we're at it, make it possible to run main.py in a somewhat
standalone mode again so that we can test things without compiling.
5470:ad060d1f1037 Sun Jun 15 00:15:00 EDT 2008 Nathan Binkert <nate@binkert.org> python: Separate the options parsing stuff. Remove options parsing stuff from
main.py so things are a bit more obvious.
/gem5/src/arch/x86/
H A DX86System.pydiff 5627:31eac202dbd1 Sat Oct 11 02:43:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
diff 5625:ea7d3676ac8d Sat Oct 11 02:39:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the Intel MP tables.
diff 5615:1c4b9b1aa500 Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Turn SMBios structures into simobjects.
diff 5450:25e395a87745 Thu Jun 12 00:58:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the e820 table manually or automatically configurable from python.
diff 5330:a1db38b0d8e8 Mon Jan 21 04:32:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Use the existing boot_osflags instead of duplicating it.
/gem5/src/arch/mips/
H A Ddsp.ccdiff 5570:13592d41f290 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> gcc: Add extra parens to quell warnings.
Even though we're not incorrect about operator precedence, let's add
some parens in some particularly confusing places to placate GCC 4.3
so that we don't have to turn the warning off. Agreed that this is a
bit of a pain for those users who get the order of operations correct,
but it is likely to prevent bugs in certain cases.
diff 5563:4c4b5dfc9944 Fri Sep 26 12:37:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: missed space after switch
diff 5558:cb98f0fcc6c6 Fri Sep 26 11:18:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: These files didn't even come close to following the M5 style guide.
H A DMipsTLB.pydiff 5628:f79155751e1d Sat Oct 11 02:47:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> TLB: Make all tlbs derive from a common base class in both python and C++.
diff 5610:0e1e9c186769 Fri Oct 10 01:19:00 EDT 2008 Nathan Binkert <nate@binkert.org> SimObjects: Clean up handling of C++ namespaces.
Make them easier to express by only having the cxx_type parameter which
has the full namespace name, and drop the cxx_namespace thing.
Add support for multiple levels of namespace.
diff 5464:7eb7f0f5e79f Sat Jun 14 03:57:00 EDT 2008 Nathan Binkert <nate@binkert.org> Fix various SWIG warnings

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