Searched hist:2008 (Results 176 - 200 of 494) sorted by relevance

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/gem5/src/cpu/o3/
H A Dbase_dyn_inst.ccdiff 5737:f43dbc09fad3 Mon Nov 10 14:51:00 EST 2008 Clint Smullen <cws3k@cs.virginia.edu> O3CPU: Make the instcount debugging stuff per-cpu.
This is to prevent the assertion from firing if you have a large multicore.
Also make sure that it's not compiled in when NDEBUG is defined
diff 5595:6ebdae3f619b Thu Oct 09 03:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> O3: Generalize the O3 CPU object so it isn't split out by ISA.
/gem5/src/dev/
H A Dmc146818.hhdiff 5606:6da7a58b0bc8 Thu Oct 09 07:58:00 EDT 2008 Nathan Binkert <nate@binkert.org> eventq: convert all usage of events to use the new API.
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
5392:c3a45fac35f8 Tue Mar 25 02:15:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.
H A DSConscriptdiff 5763:4b44fe535d05 Fri Dec 05 13:58:00 EST 2008 Ali Saidi <saidi@eecs.umich.edu> IGbE: Add support for newer 8257x based Intel NICs
diff 5485:840f91d062a9 Wed Jun 18 01:22:00 EDT 2008 Nathan Binkert <nate@binkert.org> Ethernet: share statistics between all ethernet devices and apply some
of those statistics to the e1000 model.
diff 5478:ca055528a3b3 Tue Jun 17 23:29:00 EDT 2008 Nathan Binkert <nate@binkert.org> Rename SimConsole to Terminal since it makes more sense
diff 5443:394d180e8c04 Thu Jun 12 00:54:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.
diff 5392:c3a45fac35f8 Tue Mar 25 02:15:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.
/gem5/src/arch/x86/
H A Dremote_gdb.ccdiff 5567:8fc3b004b0df Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> arch: TheISA shouldn't really ever be used in the arch directory.
We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.
diff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
H A Dinterrupts.hhdiff 5704:98224505352a Tue Oct 21 10:12:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Use the correct m5 style for things relating to interrupts.
diff 5691:28d6ff8b94e2 Mon Oct 13 02:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC timer event generate an interrupt.
diff 5655:74f76480407f Sun Oct 12 16:45:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC process interrupts and send them to the CPU.
diff 5654:340254de2031 Sun Oct 12 16:44:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC handle interrupt messages from the IO APIC.
diff 5651:7f0c8006c3d7 Sun Oct 12 16:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make APICs communicate through the memory system.
diff 5648:e8abda6e0980 Sun Oct 12 14:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the local APIC accessible through the memory system directly, and make the timer work.
diff 5647:b06b49498c79 Sun Oct 12 12:09:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
diff 5646:0a488a147fb8 Sun Oct 12 11:24:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Eliminate the get_vec function.
H A DX86LocalApic.pydiff 5651:7f0c8006c3d7 Sun Oct 12 16:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make APICs communicate through the memory system.
5647:b06b49498c79 Sun Oct 12 12:09:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
H A Dsystem.ccdiff 5627:31eac202dbd1 Sat Oct 11 02:43:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
diff 5625:ea7d3676ac8d Sat Oct 11 02:39:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the Intel MP tables.
diff 5615:1c4b9b1aa500 Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Turn SMBios structures into simobjects.
diff 5612:1bd333953e49 Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Move the smbios objects into a folder for BIOS objects.
diff 5334:5136aad50b97 Wed Jan 23 15:28:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Put an SMBios/DMI table in memory.
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.
/gem5/src/base/
H A Dcprintf_formats.hhdiff 5756:88038cdbb9e1 Wed Dec 03 07:57:00 EST 2008 Nathan Binkert <nate@binkert.org> cprintf: support a configurable width and precision ("*" in printf)
diff 5546:4ffc3cafba9b Fri Sep 19 12:11:00 EDT 2008 Nathan Binkert <nate@binkert.org> Use the proper version of C++ headers
/gem5/src/mem/
H A Dpacket_access.hhdiff 5764:f07df23e1fc8 Sat Dec 06 17:18:00 EST 2008 Nathan Binkert <nate@binkert.org> flags: Change naming of functions to be clearer
diff 5735:a88e8e7dec75 Mon Nov 10 14:51:00 EST 2008 Nathan Binkert <nate@binkert.org> style: clean up the Packet stuff
/gem5/configs/common/
H A Dcpu2000.pydiff 5378:7c058e69f257 Sat Mar 15 22:20:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> Simpoints: Fix regression bug/Don't set process.simpoint, if simpoint doesn't exist
diff 5361:e379019a1abd Wed Feb 27 00:35:00 EST 2008 Rick Strong <rstrong@cs.ucsd.edu> Configs: Make using Simpoints easier with some config files that support them easily
/gem5/src/arch/alpha/linux/
H A Dlinux.hhdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
/gem5/src/dev/alpha/
H A DTsunami.pydiff 5480:b9460d7f74f0 Tue Jun 17 23:36:00 EDT 2008 Nathan Binkert <nate@binkert.org> rename AlphaConsole to AlphaBackdoor
diff 5478:ca055528a3b3 Tue Jun 17 23:29:00 EDT 2008 Nathan Binkert <nate@binkert.org> Rename SimConsole to Terminal since it makes more sense
/gem5/src/mem/cache/prefetch/
H A Dtagged.ccdiff 5338:e75d02a09806 Sun Feb 10 17:45:00 EST 2008 Steve Reinhardt <stever@gmail.com> Fix #include lines for renamed cache files.
5337:f81512eb8bdf Sun Feb 10 17:15:00 EST 2008 Steve Reinhardt <stever@gmail.com> Rename cache files for brevity and consistency with rest of tree.
/gem5/src/arch/mips/
H A Dstacktrace.ccdiff 5567:8fc3b004b0df Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> arch: TheISA shouldn't really ever be used in the arch directory.
We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.
diff 5499:8bfc7650c344 Tue Jul 01 10:25:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> Remove delVirtPort() and make getVirtPort() only return cached version.
/gem5/src/arch/x86/linux/
H A Dsystem.ccdiff 5450:25e395a87745 Thu Jun 12 00:58:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make the e820 table manually or automatically configurable from python.
diff 5330:a1db38b0d8e8 Mon Jan 21 04:32:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Use the existing boot_osflags instead of duplicating it.
/gem5/src/dev/x86/
H A Di8254.hhdiff 5642:102cf92b8ea9 Sat Oct 11 18:15:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Set up a mechanism for the I8254 timer to cause interrupts.
5636:27a9526eea1f Sat Oct 11 05:16:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change I8254 and PCSpeaker devices from subdevices to SimObjects and eliminate subdevices.
H A Dintdev.hhdiff 5657:7539092b28ac Sun Oct 12 16:54:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a mechanism for the IO APIC to access I8259 vectors.
diff 5651:7f0c8006c3d7 Sun Oct 12 16:28:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make APICs communicate through the memory system.
5633:e1605152cc54 Sat Oct 11 04:37:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create the IntDev and IntPin system.

The IntDev class is a base for anything that supports IntPins. IntPins allow
devices to generically trigger interrupts on a particular pin of an IntDev
device without having to know what the device is or what pin they're attached
to.
/gem5/src/arch/alpha/
H A Dtlb.hhdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5568:d14250d688d2 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Clean up namespace usage.
diff 5566:3440c9ad49b4 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Get rid fo the namespace called EV5.
We're never going to do an alpha platform other than the one we've got.
diff 5532:d8ab33f5ff9a Wed Aug 13 16:29:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> Return an UnimpFault for an ITB translation of an uncachable address. We don't support fetching from uncached addresses in Alpha and it means that a speculative fetch can clobber device registers.
diff 5358:e9acb84bbafb Tue Feb 26 23:38:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> TLB: Make a TLB base class and put a virtual demapPage function in it.
H A Dvtophys.ccdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5568:d14250d688d2 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Clean up namespace usage.
diff 5566:3440c9ad49b4 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Get rid fo the namespace called EV5.
We're never going to do an alpha platform other than the one we've got.
H A Dfaults.hhdiff 5736:426510e758ad Mon Nov 10 14:51:00 EST 2008 Nathan Binkert <nate@binkert.org> mem: update stuff for changes to Packet and Request
diff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5568:d14250d688d2 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Clean up namespace usage.
H A Dlocked_mem.hhdiff 5714:76abee886def Sun Nov 02 21:57:00 EST 2008 Lisa Hsu <hsul@eecs.umich.edu> Add in Context IDs to the simulator. From now on, cpuId is almost never used,
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
diff 5712:199d31b47f7b Sun Nov 02 21:56:00 EST 2008 Lisa Hsu <hsul@eecs.umich.edu> make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
diff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
/gem5/src/cpu/
H A Dthread_state.ccdiff 5715:e8c1d4e669a7 Tue Nov 04 11:35:00 EST 2008 Lisa Hsu <hsul@eecs.umich.edu> get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
redundancies with threadId() as their replacement.
diff 5712:199d31b47f7b Sun Nov 02 21:56:00 EST 2008 Lisa Hsu <hsul@eecs.umich.edu> make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
diff 5606:6da7a58b0bc8 Thu Oct 09 07:58:00 EDT 2008 Nathan Binkert <nate@binkert.org> eventq: convert all usage of events to use the new API.
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
diff 5497:89a6483d7047 Tue Jul 01 10:24:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> Make the cached virtPort have a thread context so it can do everything that a newly created one can.
diff 5494:85c8d296c1cb Sat Jun 28 13:19:00 EDT 2008 Steve Reinhardt <stever@gmail.com> Backed out changeset 94a7bb476fca: caused memory leak.
diff 5489:94a7bb476fca Sat Jun 21 01:04:00 EDT 2008 Steve Reinhardt <stever@gmail.com> Generate more useful error messages for unconnected ports.
Force all non-default ports to provide a name and an
owner in the constructor.
diff 5482:7fea9bcd84dd Wed Jun 18 00:11:00 EDT 2008 Nathan Binkert <nate@binkert.org> ThreadState: Ensure that kernelStats is properly initialized
/gem5/src/sim/
H A Dsimulate.ccdiff 5622:e93e5b190bcc Fri Oct 10 03:17:00 EDT 2008 Nathan Binkert <nate@binkert.org> Rename the info function to inform to avoid likely name conflicts
diff 5620:c13b446714ca Fri Oct 10 13:18:00 EDT 2008 Nathan Binkert <nate@binkert.org> output: Make panic/fatal/warn more flexible so we can add some new ones.
The major thrust of this change is to limit the amount of code
duplication surrounding the code for these functions. This code also
adds two new message types called info and hack. Info is meant to be
less harsh than warn so people don't get confused and start thinking
that the simulator is broken. Hack is a way for people to add runtime
messages indicating that the simulator just executed a code "hack"
that should probably be fixed. The benefit of knowing about these
code hacks is that it will let people know what sorts of inaccuracies
or potential bugs might be entering their experiments. Finally, I've
added some flags to turn on and off these message types so command
line options can change them.
diff 5606:6da7a58b0bc8 Thu Oct 09 07:58:00 EDT 2008 Nathan Binkert <nate@binkert.org> eventq: convert all usage of events to use the new API.
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
/gem5/src/arch/x86/isa/
H A Dincludes.isadiff 5666:e7925fa8f0d6 Sun Oct 12 20:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make X86's microcode ROM actually do something.
diff 5659:f4b9c344d1ca Sun Oct 12 18:31:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement CPUID with a magical function instead of microcode.
diff 5425:4226f6c2d03c Thu Jun 12 00:49:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Add microops which panic, fatal, warn, and warn_once.
/gem5/src/mem/cache/
H A Dmshr_queue.ccdiff 5715:e8c1d4e669a7 Tue Nov 04 11:35:00 EST 2008 Lisa Hsu <hsul@eecs.umich.edu> get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
redundancies with threadId() as their replacement.
diff 5338:e75d02a09806 Sun Feb 10 17:45:00 EST 2008 Steve Reinhardt <stever@gmail.com> Fix #include lines for renamed cache files.
5337:f81512eb8bdf Sun Feb 10 17:15:00 EST 2008 Steve Reinhardt <stever@gmail.com> Rename cache files for brevity and consistency with rest of tree.

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