Searched hist:2 (Results 676 - 700 of 1916) sorted by relevance
| /gem5/src/systemc/ext/tlm_utils/ | ||
| H A D | instance_specific_extensions.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | instance_specific_extensions_int.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | multi_passthrough_target_socket.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | multi_socket_bases.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | passthrough_target_socket.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | peq_with_get.h | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/src/systemc/tlm_utils/ | ||
| H A D | convenience_socket_bases.cc | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| H A D | instance_specific_extensions.cc | diff 13586:008fe87c1ad4 Tue Jan 22 20:48:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Fix TLM related includes. There are a couple things this CL fixes related to the TLM #includes. 1. Removes #includes of <systemc> and <tlm>. These bring in a header file from boost which shouldn't be necessary but which some of the tests (and likely some external code) depends on. We avoid including those in files built into gem5 itself so that gem5 isn't dependent on boost. 2. All includes in ext should be relative. That way those headers can be removed from gem5 and still build, allowing them to be moved over to or referenced from a foreign codebase which isn't part of gem5. Change-Id: I76e267385b48cb4fe93aea89ec8319c76465a0a4 Reviewed-on: https://gem5-review.googlesource.com/c/15796 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/src/dev/arm/ | ||
| H A D | smmu_v3_cmdexec.hh | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_events.cc | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_events.hh | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_ports.cc | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_ports.hh | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_proc.cc | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | smmu_v3_proc.hh | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | amba.hh | 14039:4991b2a345a1 Tue Mar 05 05:27:00 EST 2019 Stanislaw Czerniawski <stacze01@arm.com> dev-arm: Implement a SMMUv3 model This is an implementation of the SMMUv3 architecture. What can it do? - Single-stage and nested translation with 4k or 64k granule. 16k would be straightforward to add. - Large pages are supported. - Works with any gem5 device as long as it is issuing packets with a valid (Sub)StreamId What it can't do? - Fragment stage 1 page when the underlying stage 2 page is smaller. S1 page size > S2 page size is not supported - Invalidations take zero time. This wouldn't be hard to fix. - Checkpointing is not supported - Stall/resume for faulting transactions is not supported Additional contributors: - Michiel W. van Tol <Michiel.VanTol@arm.com> - Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: Ibc606fccd9199b2c1ba739c6335c846ffaa4d564 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19008 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/src/base/ | ||
| H A D | coroutine.hh | diff 14067:2c3667b32607 Thu Aug 30 19:50:00 EDT 2018 Michiel W. van Tol <Michiel.VanTol@arm.com> base: Add argument to Coroutine class to not run on creation In some cases, the point where you create a Coroutine is not the same as where you want to start running it (and want it to switch back to). This leads to the unnecessary overhead of switching in and out of the Coroutine. This change adds an optional boolean argument to the constructor for the Coroutine class to allow for overriding the default behavior of running the Coroutine upon creation, which in specific cases can be used to avoid the unnecessary overhead and improve simulator performance. Change-Id: I044698f85e81ee4144208aee30d133bcb462d35d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18588 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | coroutine.test.cc | diff 14067:2c3667b32607 Thu Aug 30 19:50:00 EDT 2018 Michiel W. van Tol <Michiel.VanTol@arm.com> base: Add argument to Coroutine class to not run on creation In some cases, the point where you create a Coroutine is not the same as where you want to start running it (and want it to switch back to). This leads to the unnecessary overhead of switching in and out of the Coroutine. This change adds an optional boolean argument to the constructor for the Coroutine class to allow for overriding the default behavior of running the Coroutine upon creation, which in specific cases can be used to avoid the unnecessary overhead and improve simulator performance. Change-Id: I044698f85e81ee4144208aee30d133bcb462d35d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18588 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/src/cpu/testers/garnet_synthetic_traffic/ | ||
| H A D | GarnetSyntheticTraffic.py | 11661:2bc3962f59fe Thu Oct 06 14:35:00 EDT 2016 Tushar Krishna <tushar@ece.gatech.edu> ruby: rename networktest to garnet_synthetic_traffic. networktest is essentially a collection of synthetic traffic patterns for the network. The protocol name and the tester having the same name led to multiple python configuration files with the same name, adding confusion. This patch renames networktest to garnet_synthetic_traffic, and also adds more synthetic traffic patterns. |
| /gem5/tests/gem5/cpu_tests/ | ||
| H A D | test.py | diff 13850:2fe3f3dff0d7 Thu Feb 28 21:26:00 EST 2019 Hoa Nguyen <hoanguyen@ucdavis.edu> tests: add riscv to cpu tests Change-Id: Id8e767afbb74f79b980d8160eefc13e7f529f1c3 Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16889 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/learning_gem5/part2/ | ||
| H A D | simple_cache.hh | 12339:1141f798a210 Fri Oct 06 17:54:00 EDT 2017 Jason Lowe-Power <jason@lowepower.com> learning_gem5: Adding code for SimpleCache This is the rest of the code for part 2. See http://learning.gem5.org/book/part2/simplecache.html Change-Id: I5db099266a1196914656be3858fdd5fb4f8eab48 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/5023 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> |
| H A D | SimpleCache.py | 12339:1141f798a210 Fri Oct 06 17:54:00 EDT 2017 Jason Lowe-Power <jason@lowepower.com> learning_gem5: Adding code for SimpleCache This is the rest of the code for part 2. See http://learning.gem5.org/book/part2/simplecache.html Change-Id: I5db099266a1196914656be3858fdd5fb4f8eab48 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/5023 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> |
| /gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/ | ||
| H A D | move_non_temporal.py | 5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. |
| /gem5/src/dev/x86/ | ||
| H A D | i8042.hh | diff 12653:4f6b6c1a8e2f Tue Jul 11 11:26:00 EDT 2017 Andreas Sandberg <andreas.sandberg@arm.com> ps2: Factor out PS/2 devices into their own subsystem PS/2 devices are currently emulated both in the i8042 model and the Arm KMI model. This is undesirable since it leads to code duplication. This change introduces a common PS/2 device interface and factor out the x86 keyboard and mouse model. A subsequent commit will implement support for this interface in the Arm KMI model. Change-Id: I440e83517fd9dce362fdc1676db477cc6eee5211 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9762 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> diff 12653:4f6b6c1a8e2f Tue Jul 11 11:26:00 EDT 2017 Andreas Sandberg <andreas.sandberg@arm.com> ps2: Factor out PS/2 devices into their own subsystem PS/2 devices are currently emulated both in the i8042 model and the Arm KMI model. This is undesirable since it leads to code duplication. This change introduces a common PS/2 device interface and factor out the x86 keyboard and mouse model. A subsequent commit will implement support for this interface in the Arm KMI model. Change-Id: I440e83517fd9dce362fdc1676db477cc6eee5211 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9762 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> diff 12653:4f6b6c1a8e2f Tue Jul 11 11:26:00 EDT 2017 Andreas Sandberg <andreas.sandberg@arm.com> ps2: Factor out PS/2 devices into their own subsystem PS/2 devices are currently emulated both in the i8042 model and the Arm KMI model. This is undesirable since it leads to code duplication. This change introduces a common PS/2 device interface and factor out the x86 keyboard and mouse model. A subsequent commit will implement support for this interface in the Arm KMI model. Change-Id: I440e83517fd9dce362fdc1676db477cc6eee5211 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9762 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> diff 7811:a8fc35183c10 Mon Jan 03 17:35:00 EST 2011 Steve Reinhardt <steve.reinhardt@amd.com> Make commenting on close namespace brackets consistent. Ran all the source files through 'perl -pi' with this script: s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|; s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|; s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|; Also did a little manual editing on some of the arch/*/isa_traits.hh files and src/SConscript. |
| /gem5/ext/pybind11/tests/ | ||
| H A D | test_gil_scoped.cpp | 14299:2fbea9df56d2 Mon Sep 23 16:52:00 EDT 2019 Bobby R. Bruce <bbruce@ucdavis.edu> ext: Updated Pybind11 to version 2.4.1. This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes warning/error received when "<experiment/optional>" is used when compiling using c++14 with clang. It should be noted that "ext/pybind11/include/pybind11/std.h" has been changed to include a fix added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is necessary to avoid build errors. Built: Linux (gcc, c++11) and MacOS (clang, c++14). Tested: Ran quick tests for X86, ARM, and RISC-V. Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019 Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
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