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| /gem5/src/dev/arm/ | ||
| H A D | gic_v3_cpu_interface.hh | diff 13580:18ed3315bdb6 Mon Jan 21 16:14:00 EST 2019 Gabe Black <gabeblack@google.com> arm: dev: Replace ArmISA::MiscReg with RegVal in the GIC v3 model. Other dev code was already switched over. This code was written before the switch over (or unaware of it), and checked in after. Change-Id: Ibb9e9e4300d01cc46e4dae668274debc2a4989ba Reviewed-on: https://gem5-review.googlesource.com/c/15755 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | gic_v3_cpu_interface.cc | diff 13580:18ed3315bdb6 Mon Jan 21 16:14:00 EST 2019 Gabe Black <gabeblack@google.com> arm: dev: Replace ArmISA::MiscReg with RegVal in the GIC v3 model. Other dev code was already switched over. This code was written before the switch over (or unaware of it), and checked in after. Change-Id: Ibb9e9e4300d01cc46e4dae668274debc2a4989ba Reviewed-on: https://gem5-review.googlesource.com/c/15755 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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