Searched hist:13544 (Results 1 - 8 of 8) sorted by relevance

/gem5/src/arch/arm/isa/templates/
H A Dcrypto.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
H A Dneon64.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
H A Dneon.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
/gem5/src/arch/arm/isa/insts/
H A Dneon64.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
H A Dneon.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
H A Dmacromem.isadiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.ccdiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
/gem5/src/arch/arm/insts/
H A Dmacromem.ccdiff 13544:0b4e5446167c Sat Oct 13 02:32:00 EDT 2018 Gabe Black <gabeblack@google.com> arm: Stop using the FloatReg and FloatRegBits types.

This will let us make those types 64 bits to be in line with the other
architectures.

Change-Id: I5aef5199f4d2d5bb1558afedac5c6c92bf95c021
Reviewed-on: https://gem5-review.googlesource.com/c/13621
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

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