113168Smatt.horsnell@arm.com// -*- mode:c++ -*- 213168Smatt.horsnell@arm.com 313168Smatt.horsnell@arm.com// Copyright (c) 2018 ARM Limited 413168Smatt.horsnell@arm.com// All rights reserved 513168Smatt.horsnell@arm.com// 613168Smatt.horsnell@arm.com// The license below extends only to copyright in the software and shall 713168Smatt.horsnell@arm.com// not be construed as granting a license to any other intellectual 813168Smatt.horsnell@arm.com// property including but not limited to intellectual property relating 913168Smatt.horsnell@arm.com// to a hardware implementation of the functionality of the software 1013168Smatt.horsnell@arm.com// licensed hereunder. You may use the software subject to the license 1113168Smatt.horsnell@arm.com// terms below provided that you ensure that this notice is replicated 1213168Smatt.horsnell@arm.com// unmodified and in its entirety in all distributions of the software, 1313168Smatt.horsnell@arm.com// modified or unmodified, in source code or in binary form. 1413168Smatt.horsnell@arm.com// 1513168Smatt.horsnell@arm.com// Redistribution and use in source and binary forms, with or without 1613168Smatt.horsnell@arm.com// modification, are permitted provided that the following conditions are 1713168Smatt.horsnell@arm.com// met: redistributions of source code must retain the above copyright 1813168Smatt.horsnell@arm.com// notice, this list of conditions and the following disclaimer; 1913168Smatt.horsnell@arm.com// redistributions in binary form must reproduce the above copyright 2013168Smatt.horsnell@arm.com// notice, this list of conditions and the following disclaimer in the 2113168Smatt.horsnell@arm.com// documentation and/or other materials provided with the distribution; 2213168Smatt.horsnell@arm.com// neither the name of the copyright holders nor the names of its 2313168Smatt.horsnell@arm.com// contributors may be used to endorse or promote products derived from 2413168Smatt.horsnell@arm.com// this software without specific prior written permission. 2513168Smatt.horsnell@arm.com// 2613168Smatt.horsnell@arm.com// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2713168Smatt.horsnell@arm.com// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2813168Smatt.horsnell@arm.com// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2913168Smatt.horsnell@arm.com// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3013168Smatt.horsnell@arm.com// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3113168Smatt.horsnell@arm.com// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3213168Smatt.horsnell@arm.com// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3313168Smatt.horsnell@arm.com// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3413168Smatt.horsnell@arm.com// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3513168Smatt.horsnell@arm.com// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3613168Smatt.horsnell@arm.com// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3713168Smatt.horsnell@arm.com// 3813168Smatt.horsnell@arm.com// Authors: Matt Horsnell 3913168Smatt.horsnell@arm.com 4013168Smatt.horsnell@arm.com// These currently all work on quad words, so some element/register 4113168Smatt.horsnell@arm.com// storage/extraction here is fixed as constants. 4213168Smatt.horsnell@arm.comdef template CryptoPredOpExecute {{ 4313168Smatt.horsnell@arm.com Fault %(class_name)s::execute(ExecContext *xc, 4413168Smatt.horsnell@arm.com Trace::InstRecord *traceData) const 4513168Smatt.horsnell@arm.com { 4613168Smatt.horsnell@arm.com Fault fault = NoFault; 4713168Smatt.horsnell@arm.com %(op_decl)s; 4813168Smatt.horsnell@arm.com %(op_rd)s; 4913168Smatt.horsnell@arm.com 5013168Smatt.horsnell@arm.com const unsigned rCount = %(r_count)d; 5113168Smatt.horsnell@arm.com 5213168Smatt.horsnell@arm.com union RegVect { 5313544Sgabeblack@google.com uint32_t regs[rCount]; 5413168Smatt.horsnell@arm.com }; 5513168Smatt.horsnell@arm.com 5613168Smatt.horsnell@arm.com if (%(predicate_test)s) 5713168Smatt.horsnell@arm.com { 5813168Smatt.horsnell@arm.com %(code)s; 5913168Smatt.horsnell@arm.com if (fault == NoFault) 6013168Smatt.horsnell@arm.com { 6113168Smatt.horsnell@arm.com %(op_wb)s; 6213168Smatt.horsnell@arm.com } 6313168Smatt.horsnell@arm.com } else { 6413168Smatt.horsnell@arm.com xc->setPredicate(false); 6513168Smatt.horsnell@arm.com } 6613168Smatt.horsnell@arm.com 6713168Smatt.horsnell@arm.com return fault; 6813168Smatt.horsnell@arm.com } 6913168Smatt.horsnell@arm.com}}; 70