Searched hist:13116 (Results 1 - 6 of 6) sorted by relevance
| /gem5/src/arch/arm/tracers/ | ||
| H A D | tarmac_parser.cc | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/arch/arm/ | ||
| H A D | ArmISA.py | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | utility.cc | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | miscregs.cc | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | miscregs.hh | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | isa.cc | diff 13116:d3c3e2533928 Tue Sep 25 12:37:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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