Searched hist:12359 (Results 1 - 8 of 8) sorted by relevance
/gem5/src/mem/qos/ | ||
H A D | policy_pf.cc | 13023:a379876f2244 Fri Aug 17 05:17:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> mem: Implement QoS Proportional Fair policy Providing a configurable fair scheduling policy based on utilization; utilization is directly proportional to a score which is inversely proportional to the QoS priority. It is meant to avoid starvation of low priority packets. Users can tune the policy by adjusting the weight parameter (weight of the following formula) new_score = ((1.0 - weight) * old_score) + (weight * served_bytes) Change-Id: I7679e234b916c57ebed06cec0ff3cff3cf2aef22 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12359 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
H A D | policy_pf.hh | 13023:a379876f2244 Fri Aug 17 05:17:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> mem: Implement QoS Proportional Fair policy Providing a configurable fair scheduling policy based on utilization; utilization is directly proportional to a score which is inversely proportional to the QoS priority. It is meant to avoid starvation of low priority packets. Users can tune the policy by adjusting the weight parameter (weight of the following formula) new_score = ((1.0 - weight) * old_score) + (weight * served_bytes) Change-Id: I7679e234b916c57ebed06cec0ff3cff3cf2aef22 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12359 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
H A D | SConscript | diff 13023:a379876f2244 Fri Aug 17 05:17:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> mem: Implement QoS Proportional Fair policy Providing a configurable fair scheduling policy based on utilization; utilization is directly proportional to a score which is inversely proportional to the QoS priority. It is meant to avoid starvation of low priority packets. Users can tune the policy by adjusting the weight parameter (weight of the following formula) new_score = ((1.0 - weight) * old_score) + (weight * served_bytes) Change-Id: I7679e234b916c57ebed06cec0ff3cff3cf2aef22 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12359 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
H A D | QoSPolicy.py | diff 13023:a379876f2244 Fri Aug 17 05:17:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> mem: Implement QoS Proportional Fair policy Providing a configurable fair scheduling policy based on utilization; utilization is directly proportional to a score which is inversely proportional to the QoS priority. It is meant to avoid starvation of low priority packets. Users can tune the policy by adjusting the weight parameter (weight of the following formula) new_score = ((1.0 - weight) * old_score) + (weight * served_bytes) Change-Id: I7679e234b916c57ebed06cec0ff3cff3cf2aef22 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12359 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
/gem5/src/arch/arm/insts/ | ||
H A D | mem64.hh | diff 12359:8fb4630c444f Thu Jan 12 12:59:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the dc {civac, cvac, cvau, ivac} instr This patch adds support for decoding and executing the following ARMv8 cache maintenance instructions by Virtual Address: * dc civac: Clean and Invalidate by Virtual Address to the Point of Coherency * dc cvac: Clean by Virtual Address to the Point of Coherency * dc cvau: Clean by Virtual Address to the Point of Unification * dc ivac: Invalidate by Virtual Addrsess to the Point of Coherency Change-Id: I58cabda37f9636105fda1b1e84a0a04965fb5670 Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5060 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/arm/isa/templates/ | ||
H A D | mem64.isa | diff 12359:8fb4630c444f Thu Jan 12 12:59:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the dc {civac, cvac, cvau, ivac} instr This patch adds support for decoding and executing the following ARMv8 cache maintenance instructions by Virtual Address: * dc civac: Clean and Invalidate by Virtual Address to the Point of Coherency * dc cvac: Clean by Virtual Address to the Point of Coherency * dc cvau: Clean by Virtual Address to the Point of Unification * dc ivac: Invalidate by Virtual Addrsess to the Point of Coherency Change-Id: I58cabda37f9636105fda1b1e84a0a04965fb5670 Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5060 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/arm/isa/insts/ | ||
H A D | data64.isa | diff 12359:8fb4630c444f Thu Jan 12 12:59:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the dc {civac, cvac, cvau, ivac} instr This patch adds support for decoding and executing the following ARMv8 cache maintenance instructions by Virtual Address: * dc civac: Clean and Invalidate by Virtual Address to the Point of Coherency * dc cvac: Clean by Virtual Address to the Point of Coherency * dc cvau: Clean by Virtual Address to the Point of Unification * dc ivac: Invalidate by Virtual Addrsess to the Point of Coherency Change-Id: I58cabda37f9636105fda1b1e84a0a04965fb5670 Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5060 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/arch/arm/isa/formats/ | ||
H A D | aarch64.isa | diff 12359:8fb4630c444f Thu Jan 12 12:59:00 EST 2017 Nikos Nikoleris <nikos.nikoleris@arm.com> arm: Add support for the dc {civac, cvac, cvau, ivac} instr This patch adds support for decoding and executing the following ARMv8 cache maintenance instructions by Virtual Address: * dc civac: Clean and Invalidate by Virtual Address to the Point of Coherency * dc cvac: Clean by Virtual Address to the Point of Coherency * dc cvau: Clean by Virtual Address to the Point of Unification * dc ivac: Invalidate by Virtual Addrsess to the Point of Coherency Change-Id: I58cabda37f9636105fda1b1e84a0a04965fb5670 Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5060 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
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