Searched hist:11932 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/dev/virtio/ | ||
| H A D | pci.cc | diff 11932:98961d1b51ca Fri Mar 24 12:02:00 EDT 2017 Sascha Bischoff <sascha.bischoff@arm.com> dev: Align BAR0 size to power of 2 for VirtIO devices When setting the size of a PCI BAR, the kernel only supports powers of two (as per the PCI spec). Previously, the size was incorrectly read by the kernel, and the address ranges assigned to the PCI devices could overlap, resulting in gem5 crashes. We now round up to the next power of two. Kudos to Sergei Trofimov who helped to debug this issue! Change-Id: I54ca399b62ea07c09d4cd989b17dfa670e841bbe Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-by: Sergei Trofimov <sergei.trofimov@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2580 Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com> |
| /gem5/src/base/ | ||
| H A D | bitfield.hh | diff 11932:98961d1b51ca Fri Mar 24 12:02:00 EDT 2017 Sascha Bischoff <sascha.bischoff@arm.com> dev: Align BAR0 size to power of 2 for VirtIO devices When setting the size of a PCI BAR, the kernel only supports powers of two (as per the PCI spec). Previously, the size was incorrectly read by the kernel, and the address ranges assigned to the PCI devices could overlap, resulting in gem5 crashes. We now round up to the next power of two. Kudos to Sergei Trofimov who helped to debug this issue! Change-Id: I54ca399b62ea07c09d4cd989b17dfa670e841bbe Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-by: Sergei Trofimov <sergei.trofimov@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2580 Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com> |
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