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Searched hist:11334 (Results 1 - 8 of 8) sorted by relevance

/gem5/src/mem/
H A D	XBar.py	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
H A D	coherent_xbar.hh	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
H A D	simple_mem.cc	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
H A D	coherent_xbar.cc	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
H A D	bridge.cc	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
H A D	dram_ctrl.cc	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
/gem5/configs/example/
H A D	memtest.py	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.
/gem5/src/mem/cache/
H A D	cache.cc	diff 11334:9bd2e84abdca Wed Feb 10 04:08:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so, the crossbar does not forward packets where a cache with ownership has already committed to responding, and also does not forward any coherency-related packets that are not intended for a downstream memory controller. Thus, invalidations and upgrades are turned around in the crossbar, and the memory controller only sees normal reads and writes. In addition this patch moves the express snoop promotion of a packet to the crossbar, thus allowing the downstream cache to check the express snoop flag (as it should) for bypassing any blocking, rather than relying on whether a cache is responding or not.

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