Searched hist:11185 (Results 1 - 7 of 7) sorted by relevance

/gem5/src/systemc/ext/core/
H A Dsc_attr.hhdiff 12898:9c24286c7ddb Wed Jun 13 23:09:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add some "implementation defined" stuff to sc_attr_cltn.

These "impelementation defined" methods are tested by the regression
tests, so we need to have them. We might as well have the same
general interface as the Accellera implementation since nothing there
seems overly specialized for that environment.

Change-Id: Ief6567fcd9d99d3a0f526cfa3b65043b2c828efa
Reviewed-on: https://gem5-review.googlesource.com/11185
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
H A Dsc_process_handle.hhdiff 12898:9c24286c7ddb Wed Jun 13 23:09:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add some "implementation defined" stuff to sc_attr_cltn.

These "impelementation defined" methods are tested by the regression
tests, so we need to have them. We might as well have the same
general interface as the Accellera implementation since nothing there
seems overly specialized for that environment.

Change-Id: Ief6567fcd9d99d3a0f526cfa3b65043b2c828efa
Reviewed-on: https://gem5-review.googlesource.com/11185
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/systemc/core/
H A Dsc_attr.ccdiff 12898:9c24286c7ddb Wed Jun 13 23:09:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add some "implementation defined" stuff to sc_attr_cltn.

These "impelementation defined" methods are tested by the regression
tests, so we need to have them. We might as well have the same
general interface as the Accellera implementation since nothing there
seems overly specialized for that environment.

Change-Id: Ief6567fcd9d99d3a0f526cfa3b65043b2c828efa
Reviewed-on: https://gem5-review.googlesource.com/11185
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/mem/
H A DSerialLink.py11185:0ff78be3bc67 Tue Nov 03 01:17:00 EST 2015 Erfan Azarkhish <erfan.azarkhish@unibo.it> mem: hmc: serial link model

This changeset adds a serial link model for the Hybrid Memory Cube (HMC).
SerialLink is a simple variation of the Bridge class, with the ability to
account for the latency of packet serialization. Also trySendTiming has been
modified to correctly model bandwidth.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
H A Dserial_link.hh11185:0ff78be3bc67 Tue Nov 03 01:17:00 EST 2015 Erfan Azarkhish <erfan.azarkhish@unibo.it> mem: hmc: serial link model

This changeset adds a serial link model for the Hybrid Memory Cube (HMC).
SerialLink is a simple variation of the Bridge class, with the ability to
account for the latency of packet serialization. Also trySendTiming has been
modified to correctly model bandwidth.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
H A Dserial_link.cc11185:0ff78be3bc67 Tue Nov 03 01:17:00 EST 2015 Erfan Azarkhish <erfan.azarkhish@unibo.it> mem: hmc: serial link model

This changeset adds a serial link model for the Hybrid Memory Cube (HMC).
SerialLink is a simple variation of the Bridge class, with the ability to
account for the latency of packet serialization. Also trySendTiming has been
modified to correctly model bandwidth.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
H A DSConscriptdiff 11185:0ff78be3bc67 Tue Nov 03 01:17:00 EST 2015 Erfan Azarkhish <erfan.azarkhish@unibo.it> mem: hmc: serial link model

This changeset adds a serial link model for the Hybrid Memory Cube (HMC).
SerialLink is a simple variation of the Bridge class, with the ability to
account for the latency of packet serialization. Also trySendTiming has been
modified to correctly model bandwidth.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

Completed in 34 milliseconds