Searched defs:setMiscReg (Results 1 - 11 of 11) sorted by relevance
| /gem5/src/arch/arm/ |
| H A D | isa_device.cc | 61 DummyISADevice::setMiscReg(int misc_reg, RegVal val) function in class:ArmISA::DummyISADevice
|
| H A D | pmu.cc | 194 PMU::setMiscReg(int misc_reg, RegVal val) function in class:ArmISA::PMU
|
| /gem5/src/arch/riscv/ |
| H A D | isa.cc | 180 ISA::setMiscReg(int misc_reg, RegVal val, ThreadContext *tc) function in class:RiscvISA::ISA
|
| /gem5/src/arch/power/ |
| H A D | isa.hh | 85 setMiscReg(int misc_reg, RegVal val, ThreadContext *tc) function in class:PowerISA::ISA
|
| /gem5/src/arch/sparc/ |
| H A D | isa.cc | 567 ISA::setMiscReg(int miscReg, RegVal val, ThreadContext * tc) function in class:SparcISA::ISA
|
| /gem5/src/arch/x86/ |
| H A D | isa.cc | 197 ISA::setMiscReg(int miscReg, RegVal val, ThreadContext * tc) function in class:X86ISA::ISA
|
| /gem5/src/dev/arm/ |
| H A D | generic_timer.cc | 315 GenericTimer::setMiscReg(int reg, unsigned cpu, RegVal val) function in class:GenericTimer
511 GenericTimerISA::setMiscReg(int reg, RegVal val) function in class:GenericTimerISA
|
| H A D | gic_v3_cpu_interface.cc | 734 Gicv3CPUInterface::setMiscReg(int misc_reg, RegVal val) function in class:Gicv3CPUInterface
[all...] |
| /gem5/src/cpu/o3/ |
| H A D | thread_context_impl.hh | 355 O3ThreadContext<Impl>::setMiscReg(RegIndex misc_reg, RegVal val) function in class:O3ThreadContext
|
| H A D | cpu.cc | 1191 FullO3CPU<Impl>::setMiscReg(int misc_reg, RegVal val, ThreadID tid) function in class:FullO3CPU
|
| /gem5/src/arch/mips/ |
| H A D | isa.cc | 476 ISA::setMiscReg(int misc_reg, RegVal val, ThreadContext *tc, ThreadID tid) function in class:MipsISA::ISA
|
Completed in 29 milliseconds