/gem5/src/dev/arm/ |
H A D | generic_timer.hh | 103 void serialize(CheckpointOut &cp) const override; member in class:SystemCounter 104 void unserialize(CheckpointIn &cp) override; member in class:SystemCounter 181 void serialize(CheckpointOut &cp) const override; member in class:ArchTimer 182 void unserialize(CheckpointIn &cp) override; member in class:ArchTimer 185 DrainState drain() override; member in class:ArchTimer 186 void drainResume() override; member in class:ArchTimer 222 void serialize(CheckpointOut &cp) const override; member in class:GenericTimer 223 void unserialize(CheckpointIn &cp) override; member in class:GenericTimer 289 void setMiscReg(int misc_reg, RegVal val) override; member in class:GenericTimerISA 290 RegVal readMiscReg(int misc_reg) override; member in class:GenericTimerISA 302 void serialize(CheckpointOut &cp) const override; member in class:GenericTimerMem 303 void unserialize(CheckpointIn &cp) override; member in class:GenericTimerMem 307 Tick read(PacketPtr pkt) override; member in class:GenericTimerMem 308 Tick write(PacketPtr pkt) override; member in class:GenericTimerMem [all...] |
H A D | vgic.hh | 184 void serialize(CheckpointOut &cp) const override; member in struct:VGic::vcpuIntData 185 void unserialize(CheckpointIn &cp) override; member in struct:VGic::vcpuIntData 200 AddrRangeList getAddrRanges() const override; member in class:VGic 202 Tick read(PacketPtr pkt) override; member in class:VGic 203 Tick write(PacketPtr pkt) override; member in class:VGic 205 void serialize(CheckpointOut &cp) const override; member in class:VGic 206 void unserialize(CheckpointIn &cp) override; member in class:VGic
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H A D | pl111.hh | 372 Tick read(PacketPtr pkt) override; member in class:Pl111 373 Tick write(PacketPtr pkt) override; member in class:Pl111 375 void serialize(CheckpointOut &cp) const override; member in class:Pl111 376 void unserialize(CheckpointIn &cp) override; member in class:Pl111 383 AddrRangeList getAddrRanges() const override; member in class:Pl111
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H A D | hdlcd.hh | 99 void regStats() override; member in class:HDLcd 101 void serialize(CheckpointOut &cp) const override; member in class:HDLcd 102 void unserialize(CheckpointIn &cp) override; member in class:HDLcd 104 void drainResume() override; member in class:HDLcd 107 Tick read(PacketPtr pkt) override; member in class:HDLcd 108 Tick write(PacketPtr pkt) override; member in class:HDLcd 378 void serialize(CheckpointOut &cp) const override; member in class:HDLcd::DmaEngine 379 void unserialize(CheckpointIn &cp) override; member in class:HDLcd::DmaEngine 382 void onEndOfBlock() override; member in class:HDLcd::DmaEngine 383 void onIdle() override; member in class:HDLcd::DmaEngine [all...] |
H A D | gic_v3_its.hh | 101 Port & getPort(const std::string &if_name, PortID idx) override; member in class:Gicv3Its 408 void main(Yield &yield) override; member in class:Gicv3Its::ItsTranslation
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H A D | gic_v3_cpu_interface.hh | 326 void serialize(CheckpointOut & cp) const override; member in class:Gicv3CPUInterface 327 void unserialize(CheckpointIn & cp) override; member in class:Gicv3CPUInterface 350 RegVal readMiscReg(int misc_reg) override; member in class:Gicv3CPUInterface 351 void setMiscReg(int misc_reg, RegVal val) override; member in class:Gicv3CPUInterface 352 void setThreadContext(ThreadContext *tc) override; member in class:Gicv3CPUInterface
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H A D | ufs_device.hh | 176 DrainState drain() override; member in class:UFSHostDevice 178 void serialize(CheckpointOut &cp) const override; member in class:UFSHostDevice 179 void unserialize(CheckpointIn &cp) override; member in class:UFSHostDevice 830 AddrRangeList getAddrRanges() const override; member in class:UFSHostDevice 835 Tick read(PacketPtr pkt) override; member in class:UFSHostDevice 836 Tick write(PacketPtr pkt) override; member in class:UFSHostDevice 995 void regStats() override; member in class:UFSHostDevice
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/gem5/src/dev/net/ |
H A D | sinic.hh | 74 void serialize(CheckpointOut &cp) const override; member in class:Sinic::Base 75 void unserialize(CheckpointIn &cp) override; member in class:Sinic::Base 234 PortID idx=InvalidPortID) override; member in class:Sinic::Device 263 Tick read(PacketPtr pkt) override; member in class:Sinic::Device 264 Tick write(PacketPtr pkt) override; member in class:Sinic::Device 265 virtual void drainResume() override; member in class:Sinic::Device 284 void regStats() override; member in class:Sinic::Device 285 void resetStats() override; member in class:Sinic::Device 291 void serialize(CheckpointOut &cp) const override; member in class:Sinic::Device 292 void unserialize(CheckpointIn &cp) override; member in class:Sinic::Device [all...] |
H A D | i8254xGBe.hh | 328 void serialize(CheckpointOut &cp) const override; member in class:IGbE::DescCache 329 void unserialize(CheckpointIn &cp) override; member in class:IGbE::DescCache 346 void enableSm() override; member in class:IGbE::RxDescCache 390 bool hasOutstandingEvents() override; member in class:IGbE::RxDescCache 392 void serialize(CheckpointOut &cp) const override; member in class:IGbE::RxDescCache 393 void unserialize(CheckpointIn &cp) override; member in class:IGbE::RxDescCache 407 void enableSm() override; member in class:IGbE::TxDescCache 408 void actionAfterWb() override; member in class:IGbE::TxDescCache 496 bool hasOutstandingEvents() override; member in class:IGbE::TxDescCache 503 void serialize(CheckpointOut &cp) const override; member in class:IGbE::TxDescCache 504 void unserialize(CheckpointIn &cp) override; member in class:IGbE::TxDescCache 520 void init() override; member in class:IGbE 523 PortID idx=InvalidPortID) override; member in class:IGbE 527 Tick read(PacketPtr pkt) override; member in class:IGbE 528 Tick write(PacketPtr pkt) override; member in class:IGbE 530 Tick writeConfig(PacketPtr pkt) override; member in class:IGbE 535 void serialize(CheckpointOut &cp) const override; member in class:IGbE 536 void unserialize(CheckpointIn &cp) override; member in class:IGbE 538 DrainState drain() override; member in class:IGbE 539 void drainResume() override; member in class:IGbE [all...] |
H A D | ns_gige.hh | 341 PortID idx=InvalidPortID) override; member in class:NSGigE 343 Tick writeConfig(PacketPtr pkt) override; member in class:NSGigE 345 Tick read(PacketPtr pkt) override; member in class:NSGigE 346 Tick write(PacketPtr pkt) override; member in class:NSGigE 354 void serialize(CheckpointOut &cp) const override; member in class:NSGigE 355 void unserialize(CheckpointIn &cp) override; member in class:NSGigE 357 void drainResume() override; member in class:NSGigE
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/gem5/src/arch/arm/ |
H A D | tlb.hh | 219 void takeOverFrom(BaseTLB *otlb) override; member in class:ArmISA::TLB 222 void init() override; member in class:ArmISA::TLB 382 ThreadContext *tc, Mode mode) const override; member in class:ArmISA::TLB 384 void drainResume() override; member in class:ArmISA::TLB 387 void serialize(CheckpointOut &cp) const override; member in class:ArmISA::TLB 388 void unserialize(CheckpointIn &cp) override; member in class:ArmISA::TLB 390 void regStats() override; member in class:ArmISA::TLB 392 void regProbePoints() override; member in class:ArmISA::TLB 404 Port *getTableWalkerPort() override; member in class:ArmISA::TLB [all...] |
H A D | faults.hh | 214 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::ArmFault 253 FaultOffset offset(ThreadContext *tc) override; member in class:ArmISA::ArmFaultVals 255 FaultOffset offset64(ThreadContext *tc) override; member in class:ArmISA::ArmFaultVals 280 Addr getVector(ThreadContext *tc) override; member in class:ArmISA::Reset 284 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::Reset 312 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::UndefinedInstruction 313 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::UndefinedInstruction 314 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::UndefinedInstruction 315 uint32_t iss() const override; member in class:ArmISA::UndefinedInstruction 330 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::SupervisorCall 331 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::SupervisorCall 332 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::SupervisorCall 333 uint32_t iss() const override; member in class:ArmISA::SupervisorCall 344 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::SecureMonitorCall 345 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::SecureMonitorCall 346 uint32_t iss() const override; member in class:ArmISA::SecureMonitorCall 362 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::SupervisorTrap 363 uint32_t iss() const override; member in class:ArmISA::SupervisorTrap 364 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::SupervisorTrap 380 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::SecureMonitorTrap 388 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::HypervisorCall 404 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::HypervisorTrap 441 bool getFaultVAddr(Addr &va) const override; member in class:ArmISA::AbortFault 444 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::AbortFault 446 FSR getFsr(ThreadContext *tc) const override; member in class:ArmISA::AbortFault 448 bool abortDisable(ThreadContext *tc) override; member in class:ArmISA::AbortFault 449 uint32_t iss() const override; member in class:ArmISA::AbortFault 451 void annotate(ArmFault::AnnotationIDs id, uint64_t val) override; member in class:ArmISA::AbortFault 452 void setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg) override; member in class:ArmISA::AbortFault 469 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::PrefetchAbort 471 bool routeToMonitor(ThreadContext *tc) const override; member in class:ArmISA::PrefetchAbort 472 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::PrefetchAbort 497 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::DataAbort 499 bool routeToMonitor(ThreadContext *tc) const override; member in class:ArmISA::DataAbort 500 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::DataAbort 501 uint32_t iss() const override; member in class:ArmISA::DataAbort 502 void annotate(AnnotationIDs id, uint64_t val) override; member in class:ArmISA::DataAbort 517 void invoke(ThreadContext *tc, const StaticInstPtr &inst) override; member in class:ArmISA::VirtualDataAbort 523 bool routeToMonitor(ThreadContext *tc) const override; member in class:ArmISA::Interrupt 524 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::Interrupt 525 bool abortDisable(ThreadContext *tc) override; member in class:ArmISA::Interrupt 537 bool routeToMonitor(ThreadContext *tc) const override; member in class:ArmISA::FastInterrupt 538 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::FastInterrupt 539 bool abortDisable(ThreadContext *tc) override; member in class:ArmISA::FastInterrupt 540 bool fiqDisable(ThreadContext *tc) override; member in class:ArmISA::FastInterrupt 559 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::PCAlignmentFault 560 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::PCAlignmentFault 576 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::SystemError 577 bool routeToMonitor(ThreadContext *tc) const override; member in class:ArmISA::SystemError 578 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::SystemError 587 bool routeToHyp(ThreadContext *tc) const override; member in class:ArmISA::SoftwareBreakpoint 588 ExceptionClass ec(ThreadContext *tc) const override; member in class:ArmISA::SoftwareBreakpoint 597 StaticInst::nullStaticInstPtr) override; member in class:ArmISA::ArmSev [all...] |
H A D | table_walker.hh | 891 void init() override; member in class:ArmISA::TableWalker::LongDescriptor 898 DrainState drain() override; member in class:ArmISA::TableWalker::LongDescriptor 899 void drainResume() override; member in class:ArmISA::TableWalker::LongDescriptor 902 PortID idx=InvalidPortID) override; member in class:ArmISA::TableWalker::LongDescriptor 904 void regStats() override; member in class:ArmISA::TableWalker::LongDescriptor
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/gem5/src/cpu/pred/ |
H A D | tage_base.hh | 65 void regStats() override; member in class:TAGEBase 66 void init() override; member in class:TAGEBase
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H A D | multiperspective_perceptron.hh | 1024 void init() override; member in class:MultiperspectivePerceptron 1026 void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) override; member in class:MultiperspectivePerceptron 1027 void squash(ThreadID tid, void *bp_history) override; member in class:MultiperspectivePerceptron 1028 bool lookup(ThreadID tid, Addr instPC, void * &bp_history) override; member in class:MultiperspectivePerceptron 1032 Addr corrTarget = MaxAddr) override; member in class:MultiperspectivePerceptron 1033 void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override; member in class:MultiperspectivePerceptron [all...] |
/gem5/src/gpu-compute/ |
H A D | gpu_tlb.hh | 220 void regStats() override; member in class:X86ISA::GpuTLB 238 virtual void serialize(CheckpointOut& cp) const override; member in class:X86ISA::GpuTLB 239 virtual void unserialize(CheckpointIn& cp) override; member in class:X86ISA::GpuTLB 312 PortID idx=InvalidPortID) override; member in class:X86ISA::GpuTLB
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H A D | compute_unit.hh | 283 virtual void init() override; member in class:ComputeUnit 383 regStats() override; member in class:ComputeUnit
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/gem5/src/base/ |
H A D | cp_annotate.hh | 205 void serialize(CheckpointOut &cp) const override; member in struct:CPA::AnnotateData 206 void unserialize(CheckpointIn &cp) override; member in struct:CPA::AnnotateData
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/gem5/src/dev/storage/ |
H A D | ide_disk.hh | 279 void regStats() override; member in class:IdeDisk 362 void serialize(CheckpointOut &cp) const override; member in class:IdeDisk 363 void unserialize(CheckpointIn &cp) override; member in class:IdeDisk
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/gem5/src/sim/ |
H A D | eventq.hh | 411 void serialize(CheckpointOut &cp) const override; member in class:Event 412 void unserialize(CheckpointIn &cp) override; member in class:Event
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/gem5/src/arch/arm/insts/ |
H A D | vfp.hh | 897 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpCondCompRegOp 914 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpCondSelOp 932 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegOp 950 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegImmOp 969 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegImmOp 988 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegRegOp 1010 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegRegCondOp 1031 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegRegRegOp 1053 Addr pc, const SymbolTable *symtab) const override; member in class:ArmISA::FpRegRegRegImmOp
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/gem5/src/mem/cache/ |
H A D | base.hh | 293 virtual bool recvTimingSnoopResp(PacketPtr pkt) override; member in class:BaseCache::CpuSidePort 295 virtual bool tryTiming(PacketPtr pkt) override; member in class:BaseCache::CpuSidePort 297 virtual bool recvTimingReq(PacketPtr pkt) override; member in class:BaseCache::CpuSidePort 299 virtual Tick recvAtomic(PacketPtr pkt) override; member in class:BaseCache::CpuSidePort 301 virtual void recvFunctional(PacketPtr pkt) override; member in class:BaseCache::CpuSidePort 303 virtual AddrRangeList getAddrRanges() const override; member in class:BaseCache::CpuSidePort 797 virtual void memWriteback() override; member in class:BaseCache 806 virtual void memInvalidate() override; member in class:BaseCache 1045 void regStats() override; member in class:BaseCache 1048 void regProbePoints() override; member in class:BaseCache 1054 void init() override; member in class:BaseCache 1057 PortID idx=InvalidPortID) override; member in class:BaseCache 1258 void serialize(CheckpointOut &cp) const override; member in class:BaseCache 1259 void unserialize(CheckpointIn &cp) override; member in class:BaseCache [all...] |
/gem5/src/cpu/o3/ |
H A D | cpu.hh | 192 void regStats() override; member in class:FullO3CPU 198 void regProbePoints() override; member in class:FullO3CPU 222 void init() override; member in class:FullO3CPU 224 void startup() override; member in class:FullO3CPU 243 Counter totalInsts() const override; member in class:FullO3CPU 246 Counter totalOps() const override; member in class:FullO3CPU 249 void activateContext(ThreadID tid) override; member in class:FullO3CPU 252 void suspendContext(ThreadID tid) override; member in class:FullO3CPU 257 void haltContext(ThreadID tid) override; member in class:FullO3CPU 265 void serializeThread(CheckpointOut &cp, ThreadID tid) const override; member in class:FullO3CPU 266 void unserializeThread(CheckpointIn &cp, ThreadID tid) override; member in class:FullO3CPU 291 DrainState drain() override; member in class:FullO3CPU 294 void drainResume() override; member in class:FullO3CPU 306 void switchOut() override; member in class:FullO3CPU 309 void takeOverFrom(BaseCPU *oldCPU) override; member in class:FullO3CPU 311 void verifyMemoryMode() const override; member in class:FullO3CPU 670 virtual void wakeup(ThreadID tid) override; member in class:FullO3CPU [all...] |
/gem5/src/mem/ |
H A D | dram_ctrl.hh | 1176 void regStats() override; member in class:DRAMCtrl 1180 DrainState drain() override; member in class:DRAMCtrl 1183 PortID idx=InvalidPortID) override; member in class:DRAMCtrl 1185 virtual void init() override; member in class:DRAMCtrl 1186 virtual void startup() override; member in class:DRAMCtrl 1187 virtual void drainResume() override; member in class:DRAMCtrl
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