Lines Matching refs:addiw

4 # addiw.S
7 # Test addiw instruction.
20 TEST_IMM_OP( 2, addiw, 0x00000000, 0x00000000, 0x000 );
21 TEST_IMM_OP( 3, addiw, 0x00000002, 0x00000001, 0x001 );
22 TEST_IMM_OP( 4, addiw, 0x0000000a, 0x00000003, 0x007 );
24 TEST_IMM_OP( 5, addiw, 0xfffffffffffff800, 0x0000000000000000, 0x800 );
25 TEST_IMM_OP( 6, addiw, 0xffffffff80000000, 0xffffffff80000000, 0x000 );
26 TEST_IMM_OP( 7, addiw, 0x000000007ffff800, 0xffffffff80000000, 0x800 );
28 TEST_IMM_OP( 8, addiw, 0x00000000000007ff, 0x00000000, 0x7ff );
29 TEST_IMM_OP( 9, addiw, 0x000000007fffffff, 0x7fffffff, 0x000 );
30 TEST_IMM_OP( 10, addiw, 0xffffffff800007fe, 0x7fffffff, 0x7ff );
32 TEST_IMM_OP( 11, addiw, 0xffffffff800007ff, 0xffffffff80000000, 0x7ff );
33 TEST_IMM_OP( 12, addiw, 0x000000007ffff7ff, 0x000000007fffffff, 0x800 );
35 TEST_IMM_OP( 13, addiw, 0xffffffffffffffff, 0x0000000000000000, 0xfff );
36 TEST_IMM_OP( 14, addiw, 0x0000000000000000, 0xffffffffffffffff, 0x001 );
37 TEST_IMM_OP( 15, addiw, 0xfffffffffffffffe, 0xffffffffffffffff, 0xfff );
39 TEST_IMM_OP( 16, addiw, 0xffffffff80000000, 0x7fffffff, 0x001 );
45 TEST_IMM_SRC1_EQ_DEST( 17, addiw, 24, 13, 11 );
51 TEST_IMM_DEST_BYPASS( 18, 0, addiw, 24, 13, 11 );
52 TEST_IMM_DEST_BYPASS( 19, 1, addiw, 23, 13, 10 );
53 TEST_IMM_DEST_BYPASS( 20, 2, addiw, 22, 13, 9 );
55 TEST_IMM_SRC1_BYPASS( 21, 0, addiw, 24, 13, 11 );
56 TEST_IMM_SRC1_BYPASS( 22, 1, addiw, 23, 13, 10 );
57 TEST_IMM_SRC1_BYPASS( 23, 2, addiw, 22, 13, 9 );
59 TEST_IMM_ZEROSRC1( 24, addiw, 32, 32 );
60 TEST_IMM_ZERODEST( 25, addiw, 33, 50 );