src/mem/request.hh

6  * not be construed as granting a license to any other intellectual
26  * contributors may be used to endorse or promote products derived from
66  * and Cache Occupancy. Having too many tasks seems to be a problem
67  * with vector stats. 1024 seems to be a reasonable number that
110          * @note Uncacheable accesses may be reordered by CPU models. The
111          * STRICT_ORDER flag should be set if such reordering is
116          * The request is required to be strictly ordered by <i>CPU
119          * A strictly ordered request is guaranteed to never be
142          * that locked accesses have to be made up of a locked load,
154         /** The request should be prefetched into the exclusive state. */
156         /** The request should be marked as LRU. */
158         /** The request should be marked with ACQUIRE. */
160         /** The request should be marked with RELEASE. */
168         /** The request should be marked with KERNEL.
175          * The request should be handled by the generic IPR code (only
317      * The size of the request. This field must be set when vaddr or
567     // TODO: this function is still required by TimingSimpleCPU - should be
646     setByteEnable(const std::vector<bool>& be)
648         assert(be.empty() || be.size() == _size);
649         _byteEnable = be;
686         _flags field.  Thus this method should rightly be called
843      * Set/Get the time taken for this request to be successfully translated.
880         only; setting flags should be done via setFlags(). */
922      * these are for testing only; setting extraFlags should be done via