hsail/insts/decl.hh

140         bool isVectorRegister(int operandIndex) {
141             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
142             if (operandIndex < NumSrcOperands)
143                 return src[operandIndex].isVectorRegister();
147         bool isCondRegister(int operandIndex) {
148             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
149             if (operandIndex < NumSrcOperands)
150                 return src[operandIndex].isCondRegister();
154         bool isScalarRegister(int operandIndex) {
155             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
156             if (operandIndex < NumSrcOperands)
157                 return src[operandIndex].isScalarRegister();
161         bool isSrcOperand(int operandIndex) {
162             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
163             if (operandIndex < NumSrcOperands)
168         bool isDstOperand(int operandIndex) {
169             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
170             if (operandIndex >= NumSrcOperands)
174         int getOperandSize(int operandIndex) {
175             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
176             if (operandIndex < NumSrcOperands)
177                 return src[operandIndex].opSize();
182         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)
184             assert(operandIndex >= 0 && operandIndex < getNumOperands());
186             if (operandIndex < NumSrcOperands)
187                 return src[operandIndex].regIndex();
260         bool isVectorRegister(int operandIndex) {
261             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
262             if (!operandIndex)
264             else if (operandIndex == 1)
266             else if (operandIndex == 2)
271         bool isCondRegister(int operandIndex) {
272             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
273             if (!operandIndex)
275             else if (operandIndex == 1)
277             else if (operandIndex == 2)
282         bool isScalarRegister(int operandIndex) {
283             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
284             if (!operandIndex)
286             else if (operandIndex == 1)
288             else if (operandIndex == 2)
293         bool isSrcOperand(int operandIndex) {
294             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
295             if (operandIndex < 3)
300         bool isDstOperand(int operandIndex) {
301             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
302             if (operandIndex >= 3)
307         int getOperandSize(int operandIndex) {
308             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
309             if (!operandIndex)
311             else if (operandIndex == 1)
313             else if (operandIndex == 2)
320         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)
322             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
323             if (!operandIndex)
325             else if (operandIndex == 1)
327             else if (operandIndex == 2)
435         bool isVectorRegister(int operandIndex) {
436             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
437             if (!operandIndex)
439             else if (operandIndex == 1)
444         bool isCondRegister(int operandIndex) {
445             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
446             if (!operandIndex)
448             else if (operandIndex == 1)
453         bool isScalarRegister(int operandIndex) {
454             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
455             if (!operandIndex)
457             else if (operandIndex == 1)
462         bool isSrcOperand(int operandIndex) {
463             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
464             if (operandIndex < 2)
469         bool isDstOperand(int operandIndex) {
470             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
471             if (operandIndex >= 2)
476         int getOperandSize(int operandIndex) {
477             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
478             if (!operandIndex)
480             else if (operandIndex == 1)
487         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)
489             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
490             if (!operandIndex)
492             else if (operandIndex == 1)
762         bool isVectorRegister(int operandIndex) override { return false; }
763         bool isCondRegister(int operandIndex) override { return false; }
764         bool isScalarRegister(int operandIndex) override { return false; }
765         bool isSrcOperand(int operandIndex) override { return false; }
766         bool isDstOperand(int operandIndex) override { return false; }
767         int getOperandSize(int operandIndex) override { return 0; }
770         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst) override
789         bool isVectorRegister(int operandIndex) override { return false; }
790         bool isCondRegister(int operandIndex) override { return false; }
791         bool isScalarRegister(int operandIndex) override { return false; }
792         bool isSrcOperand(int operandIndex) override { return false; }
793         bool isDstOperand(int operandIndex) override { return false; }
794         int getOperandSize(int operandIndex) override { return 0; }
797         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst) override
827         bool isVectorRegister(int operandIndex) {
828             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
831         bool isCondRegister(int operandIndex) {
832             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
835         bool isScalarRegister(int operandIndex) {
836             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
839         bool isSrcOperand(int operandIndex) { return false; }
840         bool isDstOperand(int operandIndex) { return true; }
841         int getOperandSize(int operandIndex) {
842             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
847         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)
849             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
902         bool isVectorRegister(int operandIndex) {
903             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
906         bool isCondRegister(int operandIndex) {
907             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
910         bool isScalarRegister(int operandIndex) {
911             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
914         bool isSrcOperand(int operandIndex) { return false; }
915         bool isDstOperand(int operandIndex) { return true; }
916         int getOperandSize(int operandIndex) {
917             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
922         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)
924             assert((operandIndex >= 0) && (operandIndex < getNumOperands()));
1242         bool isVectorRegister(int operandIndex) { return false; }
1243         bool isCondRegister(int operandIndex) { return false; }
1244         bool isScalarRegister(int operandIndex) { return false; }
1245         bool isSrcOperand(int operandIndex) { return false; }
1246         bool isDstOperand(int operandIndex) { return false; }
1247         int getOperandSize(int operandIndex) { return 0; }
1250         getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)