sst/tests/test6_arm_4c.py

99     "cmd" : "configs/example/fs.py --num-cpus 4 --disk-image=vexpress64-openembedded_minimal-armv8_20130623-376.img --root-device=/dev/sda2 --kernel=vmlinux.aarch64.20140821 --dtb-filename=vexpress.aarch64.20140821.dtb --mem-size=256MB --machine-type=VExpress_EMM64 --cpu-type=timing --external-memory-system=sst"
133 def buildCPU(m5, num):
134     l1iCache = buildL1("cpu%u.l1iCache" % num, m5, "system.cpu%u.icache.port" % num)
135     l1dCache = buildL1("cpu%u.l1dCache" % num, m5, "system.cpu%u.dcache.port" % num)
136     itlbCache = buildL1("cpu%u.itlbCache" % num, m5, "system.cpu%u.itb_walker_cache.port" % num)
137     dtlbCache = buildL1("cpu%u.dtlbCache" % num, m5, "system.cpu%u.dtb_walker_cache.port" % num)
145     link = sst.Link("cpu%u.l1iCache_bus_link" % num) ; bus_port = bus_port + 1
147     link = sst.Link("cpu%u.l1dCache_bus_link" % num) ; bus_port = bus_port + 1
149     link = sst.Link("cpu%u.itlbCache_bus_link" % num) ; bus_port = bus_port + 1
151     link = sst.Link("cpu%u.dtlbCache_bus_link" % num) ; bus_port = bus_port + 1