Lines Matching refs:clk_domain
125 self.clk_domain = SrcClockDomain(clock=cpu_clock,
129 clk_domain=self.clk_domain)
152 def addL2(self, clk_domain):
155 self.toL2Bus = L2XBar(width=64, clk_domain=clk_domain)
194 self.clk_domain = SrcClockDomain(clock="1GHz",
277 cluster.addL2(cluster.clk_domain)
280 key=lambda c: c.clk_domain.clock[0])
281 self.l3 = L3(clk_domain=max_clock_cluster.clk_domain)