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11885:79af314e9f0d |
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27-Feb-2017 |
Brandon Potter <brandon.potter@amd.com> |
syscall_emul: [patch 14/22] adds identifier system calls
This changeset add fields to the process object and adds the following three system calls: setpgid, gettid, getpid.
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11851:824055fe6b30 |
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09-Nov-2016 |
Brandon Potter <brandon.potter@amd.com> |
syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead
The EIOProcess class was removed recently and it was the only other class which derived from Process. Since every Process invocation is also a LiveProcess invocation, it makes sense to simplify the organization by combining the fields from LiveProcess into Process.
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11156:a37dda0f0202 |
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05-Oct-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
tests: Update SMT tests to correctly configure CPUs
The 01.hello-2T-smt test case for the O3 CPU didn't correctly setup the number of threads before creating interrupt controllers, which confused the constructor in BaseCPU. This changeset adds SMT support to the test configuration infrastructure.
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11147:cc8d6e99cf46 |
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30-Sep-2015 |
Mitch Hayenga <mitch.hayenga@arm.com> |
config,cpu: Add SMT support to Atomic and Timing CPUs
Adds SMT support to the "simple" CPU models so that they can be used with other SMT-supported CPUs. Example usage: this enables the TimingSimpleCPU to be used to warmup caches before swapping to detailed mode with the in-order or out-of-order based CPU models.
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9792:c02004c2cc5b |
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27-Jun-2013 |
Andreas Hansson <andreas.hansson@arm.com> |
config: Add a BaseSESystem builder for re-use in regressions
This patch extends the existing system builders to also include a syscall-emulation builder. This builder is deployed in all syscall-emulation regressions that do not involve Ruby, i.e. o3-timing, simple-timing and simple-atomic, as well as the multi-processor regressions o3-timing-mp, simple-timing-mp and simple-atomic-mp (the latter are only used by SPARC at this point).
The values chosen for the cache sizes match those that were used in the existing config scripts (despite being on the large side). Similarly, a mem_class parameter is added to the builder base class to enable simple-atomic to use SimpleMemory and o3-timing to use the default DDR3 configuration.
Due to the different order the ports are connected, the bus stats get shuffled around for the multi-processor regressions. A separate patch bumps the port indices. Besides this, all behaviour is exactly the same.
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8802:ef66a9083bc4 |
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28-Jan-2012 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Make both SE and FS tests available all the time.
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