stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

stats: update references

stats: update references

stats: update references

stats: Update to match ARM ISA changes

stats: update stats for ld.so support

Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.

stats: update stats for mmap() change.

SE O3 runs see an additional reg read per mmap() call.

stats: update for previous changeset

Very small differences in IQ-specific O3 stats.

stats: update for O3 changes

Mostly small differences in total ticks, but O3 stall causes
shifted significantly.

30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8%
slower.

stats: update stats for ARMv8 changes

stats: update stats for cache occupancy and clock domain changes

test: update stats

Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.

tests: update reference outputs

Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes. There are a few stats.txt updates too, but
they are in the minority.

regressions: update due to cache latency fix

stats: update patches for branch predictor and fetch updates.

stats: update regressions for o3 changes in renaming and translation.

stats: update stats for previous changes.

update stats for preceeding changes

ARM: update stats for bp and squash fixes.

stats: update stats for icache change not allowing dirty data

Stats: Updates due to bus changes

This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.

Stats: Update stats for RAS and LRU fixes.

all: Update stats for memory per master and total fix.

stats: update stats for no_value -> nan
Lots of accumulated older changes too.

ARM: Update stats for IT and conditional branch changes

ARM: Update stats for CBNZ fix.

bp: fix up stats for changes to branch predictor

stats: update stats for insts/ops and master id changes

Regressions: Update stats due to O3 CPU changes

SE/FS: Make both SE and FS tests available all the time.