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12888:1582dce7cc91 |
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16-Aug-2018 |
Brandon Potter <brandon.potter@amd.com> |
hsail-x86: fix addr_range_map error
683f411dca introduced changes to the addr_range_map's "find" method. Nikos replaced the relevant code with a new "contains" method. Propagate the changes to the gpu-compute code.
Change-Id: I8cfe3b15cbfb476685b0ed5ba423ea5a8f1000d8 Reviewed-on: https://gem5-review.googlesource.com/12107 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
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12603:ab2cec4483af |
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16-Mar-2018 |
Gabe Black <gabeblack@google.com> |
hsail: Get rid of an inert private member of StorageSpace.
The "segment" private element in this class was only ever set to zero on construction, and then used to index into a list of segment names to get the string "none" in a DPRINTF. If debugging was turned off, there would be no consumers of that variable, and that upset g++. This change removes the essentially useless variable, and also that bit of text in the DPRINTF.
Change-Id: I3f85db4af5f0678768243daf84b8d698350af931 Reviewed-on: https://gem5-review.googlesource.com/9221 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
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11697:c63431b7bbeb |
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26-Oct-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
gpu-compute, hsail: make the PC a byte address, not an instruction index
currently the PC is incremented on an instruction granularity, and not as an instruction's byte address. machine ISA instructions assume the PC is a byte address, and is incremented accordingly. here we make the GPU model, and the HSAIL instructions treat the PC as a byte address as well.
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11308:7d8836fd043d |
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19-Jan-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
gpu-compute: AMD's baseline GPU model
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