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12697:cd71b966be1e |
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27-Apr-2018 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
style: fix amd license and style issues
Change-Id: I26136fb49f743c4a597f8021cfd27f78897267b5 Reviewed-on: https://gem5-review.googlesource.com/10463 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
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12696:15d4edfbb01b |
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03-May-2018 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
gpu-compute: Cleanup the scheduler a bit
Change-Id: If2c626544f208e15c91be975dee9253126862ced Reviewed-on: https://gem5-review.googlesource.com/10222 Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
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11692:e772fdcd3809 |
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26-Oct-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
gpu-compute: remove inst enums and use bit flag for attributes
this patch removes the GPUStaticInst enums that were defined in GPU.py. instead, a simple set of attribute flags that can be set in the base instruction class are used. this will help unify the attributes of HSAIL and machine ISA instructions within the model itself.
because the static instrution now carries the attributes, a GPUDynInst must carry a pointer to a valid GPUStaticInst so a new static kernel launch instruction is added, which carries the attributes needed to perform a the kernel launch.
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11642:46cffde5d8a6 |
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16-Sep-2016 |
Alexandru Dutu <alexandru.dutu@amd.com> |
gpu-compute: Adding vector register file debug messages This patch introduces DPRINTFs for reading and writing to and from the vector register file.
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11308:7d8836fd043d |
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19-Jan-2016 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
gpu-compute: AMD's baseline GPU model
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