History log of /gem5/src/arch/x86/isa/insts/system/segmentation.py
Revision Date Author Comments
# 12584:2af98e1fb894 12-Mar-2018 Gabe Black <gabeblack@google.com>

x86: Replace the .serializing directive with .serialize_(before|after).

This makes it explicit which type of serialization you want, and also
makes it possible to make a macroop serialize before. The old
serializing directive was renamed .serialize_after in the microcode
assembler, and throughout the microcode implementation, and its
behavior is unchanged. More specifically, it still marks the last
microop within the macroop as IsSerializing and IsSerializeAfter.

The new .serialize_before directive does something similar and marks
the first microop as IsSerializing and IsSerializeBefore.

Change-Id: Ia53466c734c651c65400809de7ef903c4a6c3e7e
Reviewed-on: https://gem5-review.googlesource.com/9041
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>


# 10959:30c700ee0d47 20-Jul-2015 David Hashe <david.hashe@amd.com>

x86: x86 instruction-implementation bug fixes

Added explicit data sizes and an opcode type for correct execution.


# 8290:3c628a51f6e1 06-May-2011 Gabe Black <gblack@eecs.umich.edu>

X86: Fix the Lldt instructions so they load the ldtr and not the tr.


# 7622:b49144029ec8 23-Aug-2010 Gabe Black <gblack@eecs.umich.edu>

X86: Mark serializing macroops and regular instructions as such.


# 7087:fb8d5786ff30 24-May-2010 Nathan Binkert <nate@binkert.org>

copyright: Change HP copyright on x86 code to be more friendly


# 6644:57fba079b7ff 16-Sep-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Fix setting the busy bit in the task descriptor in LTR.


# 6062:2116d308076f 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Explicitly use the right width in a few places that need a 64 bit value.


# 5937:177534612ec0 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the lldt instruction.


# 5930:ec124ac0984b 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Rename oszForPseudoDesc maxOsz to reflect its more general use.


# 5927:5e3367b103da 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Do a merge for the zero extension microop.


# 5902:7a323daa3df2 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the LTR instruction.


# 5683:e1a1d8bba254 13-Oct-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the swapgs instruction.


# 5294:7222bdaed33b 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Reorganize segmentation and implement segment selector movs.


# 5292:a26311673ef0 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the LIDT instruction.


# 5291:5d38610cff05 02-Dec-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the lgdt instruction.