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12222:6db0fc7407a5 |
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15-Oct-2017 |
Gabe Black <gabeblack@google.com> |
scons: Stop generating inc.d in the isa parser.
Generating dependency/build product information in the isa parser breaks scons idea of how a build is supposed to work. Arm twisting it into working forced a lot of false dependencies which slowed down the build.
Change-Id: Iadee8c930fd7c80136d200d69870df7672a6b3ca Reviewed-on: https://gem5-review.googlesource.com/5081 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
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11705:d40bdd3c5778 |
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17-Nov-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
alpha: Remove ALPHA tru64 support and associated tests
No one appears to be using it, and it is causing build issues and increases the development and maintenance effort.
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10196:be0e1724eb39 |
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09-May-2014 |
Curtis Dunham <Curtis.Dunham@arm.com> |
arch: teach ISA parser how to split code across files
This patch encompasses several interrelated and interdependent changes to the ISA generation step. The end goal is to reduce the size of the generated compilation units for instruction execution and decoding so that batch compilation can proceed with all CPUs active without exhausting physical memory.
The ISA parser (src/arch/isa_parser.py) has been improved so that it can accept 'split [output_type];' directives at the top level of the grammar and 'split(output_type)' python calls within 'exec {{ ... }}' blocks. This has the effect of "splitting" the files into smaller compilation units. I use air-quotes around "splitting" because the files themselves are not split, but preprocessing directives are inserted to have the same effect.
Architecturally, the ISA parser has had some changes in how it works. In general, it emits code sooner. It doesn't generate per-CPU files, and instead defers to the C preprocessor to create the duplicate copies for each CPU type. Likewise there are more files emitted and the C preprocessor does more substitution that used to be done by the ISA parser.
Finally, the build system (SCons) needs to be able to cope with a dynamic list of source files coming out of the ISA parser. The changes to the SCons{cript,truct} files support this. In broad strokes, the targets requested on the command line are hidden from SCons until all the build dependencies are determined, otherwise it would try, realize it can't reach the goal, and terminate in failure. Since build steps (i.e. running the ISA parser) must be taken to determine the file list, several new build stages have been inserted at the very start of the build. First, the build dependencies from the ISA parser will be emitted to arch/$ISA/generated/inc.d, which is then read by a new SCons builder to finalize the dependencies. (Once inc.d exists, the ISA parser will not need to be run to complete this step.) Once the dependencies are known, the 'Environments' are made by the makeEnv() function. This function used to be called before the build began but now happens during the build. It is easy to see that this step is quite slow; this is a known issue and it's important to realize that it was already slow, but there was no obvious cause to attribute it to since nothing was displayed to the terminal. Since new steps that used to be performed serially are now in a potentially-parallel build phase, the pathname handling in the SCons scripts has been tightened up to deal with chdir() race conditions. In general, pathnames are computed earlier and more likely to be stored, passed around, and processed as absolute paths rather than relative paths. In the end, some of these issues had to be fixed by inserting serializing dependencies in the build.
Minor note: For the null ISA, we just provide a dummy inc.d so SCons is never compelled to try to generate it. While it seems slightly wrong to have anything in src/arch/*/generated (i.e. a non-generated 'generated' file), it's by far the simplest solution.
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9384:877293183bdf |
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07-Jan-2013 |
Andreas Sandberg <Andreas.Sandberg@arm.com> |
arch: Make the ISA class inherit from SimObject
The ISA class on stores the contents of ID registers on many architectures. In order to make reset values of such registers configurable, we make the class inherit from SimObject, which allows us to use the normal generated parameter headers.
This patch introduces a Python helper method, BaseCPU.createThreads(), which creates a set of ISAs for each of the threads in an SMT system. Although it is currently only needed when creating multi-threaded CPUs, it should always be called before instantiating the system as this is an obvious place to configure ID registers identifying a thread/CPU.
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9057:f5ee56466b91 |
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05-Jun-2012 |
Ali Saidi <Ali.Saidi@ARM.com> |
ISA: Back-out NoopMachInst as a StaticInstPtr change.
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9040:cdfe09f9bdee |
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04-Jun-2012 |
Gabe Black <gblack@eecs.umich.edu> |
ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.
This eliminates a use of the ExtMachInst type outside of the ISAs.
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9022:bb25e7646c41 |
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25-May-2012 |
Gabe Black <gblack@eecs.umich.edu> |
ISA: Make the decode function part of the ISA's decoder.
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8780:89e0822462a1 |
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01-Nov-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
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8777:dd43f1c9fa0a |
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31-Oct-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Make the functions available from the TC consistent between SE and FS.
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8755:a9934545489d |
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16-Oct-2011 |
Gabe Black <gblack@eecs.umich.edu> |
Alpha: Turn on vtophys in SE mode.
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8745:575cab0db076 |
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09-Oct-2011 |
Gabe Black <gblack@eecs.umich.edu> |
SE/FS: Build the Interrupt objects in SE mode.
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6330:786136379872 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Alpha: Pull the MiscRegFile fully into the ISA object.
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6329:5d8b91875859 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Registers: Add a registers.hh file as an ISA switched header. This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
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6327:f6148086f997 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Alpha: Move reg_redir into its own files, and move some constants into regfile.hh.
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6321:c14676e17110 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Alpha: Phase out Alpha's intregfile.hh and intregfile.cc.
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6315:c7295a4826d5 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Registers: Eliminate the ISA defined floating point register file.
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6313:95f69a436c82 |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
Registers: Add an ISA object which replaces the MiscRegFile. This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
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5647:b06b49498c79 |
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12-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
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5217:bb810bb8ca2d |
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08-Nov-2007 |
Ali Saidi <saidi@eecs.umich.edu> |
CPU: Add function to explictly compare thread contexts after copying.
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5192:582e583f8e7e |
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31-Oct-2007 |
Ali Saidi <saidi@eecs.umich.edu> |
Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
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4997:e7380529bd2d |
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26-Aug-2007 |
Gabe Black <gblack@eecs.umich.edu> |
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
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4826:259b996a6da6 |
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01-Aug-2007 |
Ali Saidi <saidi@eecs.umich.edu> |
Arguments: Get rid of duplicate code for the Arguments class in each architecture. Move the argument files to src/sim and add a utility.cc file with a function getArguments() that returns the given argument in the architecture specific fashion. getArguments() was getArg() is the architecture specific Argument class and has had all magic numbers replaced with meaningful constants. Also add a function to the Argument class for testing if an argument is NULL.
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4486:aaeb03a8a6e1 |
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27-May-2007 |
Nathan Binkert <binkertn@umich.edu> |
Move SimObject python files alongside the C++ and fix the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore.
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4202:f7a05daec670 |
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11-Mar-2007 |
Nathan Binkert <binkertn@umich.edu> |
Rework the way SCons recurses into subdirectories, making it automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built.
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3960:1dca397b2bab |
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20-Dec-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Initial work to make remote gdb available in SE mode. This is completely untested.
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3592:1288f259d55c |
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10-Nov-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
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3591:5c36532efd3c |
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10-Nov-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Split out alpha integer register file into it's own files.
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3586:c5cc95fc5a61 |
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09-Nov-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha specific DepTag constants.
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3565:6ad587fb7dfd |
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07-Nov-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Put kernel_stats back into arch.
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3536:89aa06409e4d |
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06-Nov-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Remote GDB support has been changed to use inheritance. Alpha should work, but isn't tested. Other architectures will not.
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3457:7479ebe49444 |
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31-Oct-2006 |
Gabe Black <gblack@eecs.umich.edu> |
Make the IPRs use regular miscreg indexes, and make a table or two to find the miscreg index of a specific IPR.
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2665:a124942bacb8 |
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31-May-2006 |
Ali Saidi <saidi@eecs.umich.edu> |
Updated Authors from bk prs info
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2632:1bb2f91485ea |
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22-May-2006 |
Steve Reinhardt <stever@eecs.umich.edu> |
New directory structure: - simulator source now in 'src' subdirectory - imported files from 'ext' repository - support building in arbitrary places, including outside of the source tree. See comment at top of SConstruct file for more details. Regression tests are temporarily disabled; that syetem needs more extensive revisions.
SConstruct: Update for new directory structure. Modify to support build trees that are not subdirectories of the source tree. See comment at top of file for more details. Regression tests are temporarily disabled. src/arch/SConscript: src/arch/isa_parser.py: src/python/SConscript: Update for new directory structure.
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