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4454:8125c4b9e306 |
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15-May-2007 |
Ali Saidi <saidi@eecs.umich.edu> |
hopefully the final hacky change to make the bus bridge work ok cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here
src/mem/bridge.cc: src/mem/bridge.hh: hopefully the final hacky change to make the bus bridge work ok
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