43,45c43,45
< # icache =
< # icache.overall_hits::total
< # icache.overall_misses::total
---
> # commit_inst_count =
> # system.cluster.cpu#.commit.committedInsts
> # system.cluster.cpu#.commit.commitSquashedInsts
47c47
< # will display the icache as a stacked line chart.
---
> # will display the inst counts (committed/squashed) as a stacked line chart.
51c51
< # "system.cpu#." will automatically prepended for per-CPU stats
---
> # '#' will be automatically replaced with the correct CPU id.
52a53,55
> commit_inst_count =
> system.cluster.cpu#.committedInsts
>
54,55c57,58
< num_busy_cycles
< num_idle_cycles
---
> system.cluster.cpu#.num_busy_cycles
> system.cluster.cpu#.num_idle_cycles
58,59c61,62
< num_int_register_reads
< num_int_register_writes
---
> system.cluster.cpu#.num_int_register_reads
> system.cluster.cpu#.num_int_register_writes
62c65
< num_mem_refs
---
> system.cluster.cpu#.num_mem_refs
65,69c68,72
< num_conditional_control_insts
< num_int_insts
< num_fp_insts
< num_load_insts
< num_store_insts
---
> system.cluster.cpu#.num_conditional_control_insts
> system.cluster.cpu#.num_int_insts
> system.cluster.cpu#.num_fp_insts
> system.cluster.cpu#.num_load_insts
> system.cluster.cpu#.num_store_insts
72,73c75,76
< icache.overall_hits::total
< icache.overall_misses::total
---
> system.cluster.il1_cache#.overall_hits::total
> system.cluster.il1_cache#.overall_misses::total
76,77c79,80
< dcache.overall_hits::total
< dcache.overall_misses::total
---
> system.cluster.dl1_cache#.overall_hits::total
> system.cluster.dl1_cache#.overall_misses::total
79,83d81
< [PER_SWITCHCPU_STATS]
< # If starting from checkpoints, gem5 keeps CPU stats in system.switch_cpus# structures.
< # List per-switchcpu stats here if any
< # "system.switch_cpus#" will automatically prepended for per-CPU stats
<
84a83
> # '#' will be automatically replaced with the correct L2 id.
87,88c86,87
< overall_hits::total
< overall_misses::total
---
> system.cluster.l2_cache#.overall_hits::total
> system.cluster.l2_cache#.overall_misses::total
90a90
> # Anything that doesn't belong to CPU or L2 caches
93c93,94
< system.physmem.bw_total::total
---
> system.memsys.mem_ctrls.bytes_read::total
> system.memsys.mem_ctrls.bytes_written::total