m5op_alpha.S (5741:323dac95e72c) m5op_alpha.S (5808:baf5d5c96c68)
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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55 END(_f)
56
57#define ARM(reg) INST(m5_op, reg, 0, arm_func)
58#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
59#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
60#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
61#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
62#define RPNS INST(m5_op, 0, 0, rpns_func)
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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55 END(_f)
56
57#define ARM(reg) INST(m5_op, reg, 0, arm_func)
58#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
59#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
60#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
61#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
62#define RPNS INST(m5_op, 0, 0, rpns_func)
63#define WAKE_CPU(r1) INST(m5_op, r1, 0, wakecpu_func)
63#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
64#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
65#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
66#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
67#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
68#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
69#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
70#define READFILE INST(m5_op, 0, 0, readfile_func)

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76 .set noreorder
77
78SIMPLE_OP(arm, ARM(16))
79SIMPLE_OP(quiesce, QUIESCE)
80SIMPLE_OP(quiesceNs, QUIESCENS(16))
81SIMPLE_OP(quiesceCycle, QUIESCECYC(16))
82SIMPLE_OP(quiesceTime, QUIESCETIME)
83SIMPLE_OP(rpns, RPNS)
64#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
65#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
66#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
67#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
68#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
69#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
70#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
71#define READFILE INST(m5_op, 0, 0, readfile_func)

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77 .set noreorder
78
79SIMPLE_OP(arm, ARM(16))
80SIMPLE_OP(quiesce, QUIESCE)
81SIMPLE_OP(quiesceNs, QUIESCENS(16))
82SIMPLE_OP(quiesceCycle, QUIESCECYC(16))
83SIMPLE_OP(quiesceTime, QUIESCETIME)
84SIMPLE_OP(rpns, RPNS)
85SIMPLE_OP(wakeCPU, WAKE_CPU(16))
84SIMPLE_OP(m5_exit, M5EXIT(16))
85SIMPLE_OP(m5_initparam, INITPARAM(0))
86SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0))
87SIMPLE_OP(m5_reset_stats, RESET_STATS(16, 17))
88SIMPLE_OP(m5_dump_stats, DUMP_STATS(16, 17))
89SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS(16, 17))
90SIMPLE_OP(m5_checkpoint, CHECKPOINT(16, 17))
91SIMPLE_OP(m5_readfile, READFILE)
92SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
93SIMPLE_OP(m5_switchcpu, SWITCHCPU)
94SIMPLE_OP(m5_addsymbol, ADDSYMBOL(16, 17))
95SIMPLE_OP(m5_panic, PANIC)
96
86SIMPLE_OP(m5_exit, M5EXIT(16))
87SIMPLE_OP(m5_initparam, INITPARAM(0))
88SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0))
89SIMPLE_OP(m5_reset_stats, RESET_STATS(16, 17))
90SIMPLE_OP(m5_dump_stats, DUMP_STATS(16, 17))
91SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS(16, 17))
92SIMPLE_OP(m5_checkpoint, CHECKPOINT(16, 17))
93SIMPLE_OP(m5_readfile, READFILE)
94SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
95SIMPLE_OP(m5_switchcpu, SWITCHCPU)
96SIMPLE_OP(m5_addsymbol, ADDSYMBOL(16, 17))
97SIMPLE_OP(m5_panic, PANIC)
98