1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 79 unchanged lines hidden (view full) --- 88p_state_clk_gate_max=1000000000000 89p_state_clk_gate_min=1000 90power_model=Null 91profile=0 92progress_interval=0 93simpoint_start_insts= 94socket_id=0 95switched_out=false |
96syscallRetryLatency=10000 |
97system=system 98tracer=system.cpu.tracer 99workload=system.cpu.workload 100dcache_port=system.cpu.dcache.cpu_side 101icache_port=system.cpu.icache.cpu_side 102 103[system.cpu.dcache] 104type=Cache 105children=tags 106addr_ranges=0:18446744073709551615:0:0:0:0 107assoc=2 108clk_domain=system.clk_domain 109clusivity=mostly_incl |
110data_latency=2 |
111default_p_state=UNDEFINED 112demand_mshr_reserve=1 113eventq_index=0 |
114is_read_only=false 115max_miss_count=0 116mshrs=4 117p_state_clk_gate_bins=20 118p_state_clk_gate_max=1000000000000 119p_state_clk_gate_min=1000 120power_model=Null 121prefetch_on_access=false 122prefetcher=Null 123response_latency=2 124sequential_access=false 125size=65536 126system=system |
127tag_latency=2 |
128tags=system.cpu.dcache.tags 129tgts_per_mshr=20 130write_buffers=8 131writeback_clean=false 132cpu_side=system.cpu.dcache_port 133mem_side=system.l2bus.slave[1] 134 135[system.cpu.dcache.tags] 136type=LRU 137assoc=2 138block_size=64 139clk_domain=system.clk_domain |
140data_latency=2 |
141default_p_state=UNDEFINED 142eventq_index=0 |
143p_state_clk_gate_bins=20 144p_state_clk_gate_max=1000000000000 145p_state_clk_gate_min=1000 146power_model=Null 147sequential_access=false 148size=65536 |
149tag_latency=2 |
150 151[system.cpu.dstage2_mmu] 152type=ArmStage2MMU 153children=stage2_tlb 154eventq_index=0 155stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 156sys=system 157tlb=system.cpu.dtb --- 42 unchanged lines hidden (view full) --- 200 201[system.cpu.icache] 202type=Cache 203children=tags 204addr_ranges=0:18446744073709551615:0:0:0:0 205assoc=2 206clk_domain=system.clk_domain 207clusivity=mostly_incl |
208data_latency=2 |
209default_p_state=UNDEFINED 210demand_mshr_reserve=1 211eventq_index=0 |
212is_read_only=false 213max_miss_count=0 214mshrs=4 215p_state_clk_gate_bins=20 216p_state_clk_gate_max=1000000000000 217p_state_clk_gate_min=1000 218power_model=Null 219prefetch_on_access=false 220prefetcher=Null 221response_latency=2 222sequential_access=false 223size=16384 224system=system |
225tag_latency=2 |
226tags=system.cpu.icache.tags 227tgts_per_mshr=20 228write_buffers=8 229writeback_clean=false 230cpu_side=system.cpu.icache_port 231mem_side=system.l2bus.slave[0] 232 233[system.cpu.icache.tags] 234type=LRU 235assoc=2 236block_size=64 237clk_domain=system.clk_domain |
238data_latency=2 |
239default_p_state=UNDEFINED 240eventq_index=0 |
241p_state_clk_gate_bins=20 242p_state_clk_gate_max=1000000000000 243p_state_clk_gate_min=1000 244power_model=Null 245sequential_access=false 246size=16384 |
247tag_latency=2 |
248 249[system.cpu.interrupts] 250type=ArmInterrupts 251eventq_index=0 252 253[system.cpu.isa] 254type=ArmISA 255decoderFlavour=Generic 256eventq_index=0 257fpsid=1090793632 258id_aa64afr0_el1=0 259id_aa64afr1_el1=0 260id_aa64dfr0_el1=1052678 261id_aa64dfr1_el1=0 262id_aa64isar0_el1=0 263id_aa64isar1_el1=0 264id_aa64mmfr0_el1=15728642 265id_aa64mmfr1_el1=0 |
266id_isar0=34607377 267id_isar1=34677009 268id_isar2=555950401 269id_isar3=17899825 270id_isar4=268501314 271id_isar5=0 272id_mmfr0=270536963 273id_mmfr1=0 274id_mmfr2=19070976 275id_mmfr3=34611729 |
276midr=1091551472 277pmu=Null 278system=system 279 280[system.cpu.istage2_mmu] 281type=ArmStage2MMU 282children=stage2_tlb 283eventq_index=0 --- 43 unchanged lines hidden (view full) --- 327power_model=Null 328sys=system 329 330[system.cpu.tracer] 331type=ExeTracer 332eventq_index=0 333 334[system.cpu.workload] |
335type=Process |
336cmd=tests/test-progs/hello/bin/arm/linux/hello 337cwd= 338drivers= 339egid=100 340env= 341errout=cerr 342euid=100 343eventq_index=0 344executable= 345gid=100 346input=cin 347kvmInSE=false |
348maxStackSize=67108864 |
349output=cout |
350pgid=100 |
351pid=100 |
352ppid=0 |
353simpoint=0 354system=system 355uid=100 356useArchPT=false 357 358[system.dvfs_handler] 359type=DVFSHandler 360domains= --- 33 unchanged lines hidden (view full) --- 394 395[system.l2cache] 396type=Cache 397children=tags 398addr_ranges=0:18446744073709551615:0:0:0:0 399assoc=8 400clk_domain=system.clk_domain 401clusivity=mostly_incl |
402data_latency=20 |
403default_p_state=UNDEFINED 404demand_mshr_reserve=1 405eventq_index=0 |
406is_read_only=false 407max_miss_count=0 408mshrs=20 409p_state_clk_gate_bins=20 410p_state_clk_gate_max=1000000000000 411p_state_clk_gate_min=1000 412power_model=Null 413prefetch_on_access=false 414prefetcher=Null 415response_latency=20 416sequential_access=false 417size=262144 418system=system |
419tag_latency=20 |
420tags=system.l2cache.tags 421tgts_per_mshr=12 422write_buffers=8 423writeback_clean=false 424cpu_side=system.l2bus.master[0] 425mem_side=system.membus.slave[0] 426 427[system.l2cache.tags] 428type=LRU 429assoc=8 430block_size=64 431clk_domain=system.clk_domain |
432data_latency=20 |
433default_p_state=UNDEFINED 434eventq_index=0 |
435p_state_clk_gate_bins=20 436p_state_clk_gate_max=1000000000000 437p_state_clk_gate_min=1000 438power_model=Null 439sequential_access=false 440size=262144 |
441tag_latency=20 |
442 443[system.mem_ctrl] 444type=DRAMCtrl 445IDD0=0.055000 446IDD02=0.000000 447IDD2N=0.032000 448IDD2N2=0.000000 449IDD2P0=0.000000 --- 105 unchanged lines hidden --- |