1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 79 unchanged lines hidden (view full) ---

88p_state_clk_gate_max=1000000000000
89p_state_clk_gate_min=1000
90power_model=Null
91profile=0
92progress_interval=0
93simpoint_start_insts=
94socket_id=0
95switched_out=false
96system=system
97tracer=system.cpu.tracer
98workload=system.cpu.workload
99dcache_port=system.cpu.dcache.cpu_side
100icache_port=system.cpu.icache.cpu_side
101
102[system.cpu.dcache]
103type=Cache
104children=tags
105addr_ranges=0:18446744073709551615:0:0:0:0
106assoc=2
107clk_domain=system.clk_domain
108clusivity=mostly_incl
109default_p_state=UNDEFINED
110demand_mshr_reserve=1
111eventq_index=0
112hit_latency=2
113is_read_only=false
114max_miss_count=0
115mshrs=4
116p_state_clk_gate_bins=20
117p_state_clk_gate_max=1000000000000
118p_state_clk_gate_min=1000
119power_model=Null
120prefetch_on_access=false
121prefetcher=Null
122response_latency=2
123sequential_access=false
124size=65536
125system=system
126tags=system.cpu.dcache.tags
127tgts_per_mshr=20
128write_buffers=8
129writeback_clean=false
130cpu_side=system.cpu.dcache_port
131mem_side=system.l2bus.slave[1]
132
133[system.cpu.dcache.tags]
134type=LRU
135assoc=2
136block_size=64
137clk_domain=system.clk_domain
138default_p_state=UNDEFINED
139eventq_index=0
140hit_latency=2
141p_state_clk_gate_bins=20
142p_state_clk_gate_max=1000000000000
143p_state_clk_gate_min=1000
144power_model=Null
145sequential_access=false
146size=65536
147
148[system.cpu.dstage2_mmu]
149type=ArmStage2MMU
150children=stage2_tlb
151eventq_index=0
152stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
153sys=system
154tlb=system.cpu.dtb

--- 42 unchanged lines hidden (view full) ---

197
198[system.cpu.icache]
199type=Cache
200children=tags
201addr_ranges=0:18446744073709551615:0:0:0:0
202assoc=2
203clk_domain=system.clk_domain
204clusivity=mostly_incl
205default_p_state=UNDEFINED
206demand_mshr_reserve=1
207eventq_index=0
208hit_latency=2
209is_read_only=false
210max_miss_count=0
211mshrs=4
212p_state_clk_gate_bins=20
213p_state_clk_gate_max=1000000000000
214p_state_clk_gate_min=1000
215power_model=Null
216prefetch_on_access=false
217prefetcher=Null
218response_latency=2
219sequential_access=false
220size=16384
221system=system
222tags=system.cpu.icache.tags
223tgts_per_mshr=20
224write_buffers=8
225writeback_clean=false
226cpu_side=system.cpu.icache_port
227mem_side=system.l2bus.slave[0]
228
229[system.cpu.icache.tags]
230type=LRU
231assoc=2
232block_size=64
233clk_domain=system.clk_domain
234default_p_state=UNDEFINED
235eventq_index=0
236hit_latency=2
237p_state_clk_gate_bins=20
238p_state_clk_gate_max=1000000000000
239p_state_clk_gate_min=1000
240power_model=Null
241sequential_access=false
242size=16384
243
244[system.cpu.interrupts]
245type=ArmInterrupts
246eventq_index=0
247
248[system.cpu.isa]
249type=ArmISA
250decoderFlavour=Generic
251eventq_index=0
252fpsid=1090793632
253id_aa64afr0_el1=0
254id_aa64afr1_el1=0
255id_aa64dfr0_el1=1052678
256id_aa64dfr1_el1=0
257id_aa64isar0_el1=0
258id_aa64isar1_el1=0
259id_aa64mmfr0_el1=15728642
260id_aa64mmfr1_el1=0
261id_aa64pfr0_el1=34
262id_aa64pfr1_el1=0
263id_isar0=34607377
264id_isar1=34677009
265id_isar2=555950401
266id_isar3=17899825
267id_isar4=268501314
268id_isar5=0
269id_mmfr0=270536963
270id_mmfr1=0
271id_mmfr2=19070976
272id_mmfr3=34611729
273id_pfr0=49
274id_pfr1=4113
275midr=1091551472
276pmu=Null
277system=system
278
279[system.cpu.istage2_mmu]
280type=ArmStage2MMU
281children=stage2_tlb
282eventq_index=0

--- 43 unchanged lines hidden (view full) ---

326power_model=Null
327sys=system
328
329[system.cpu.tracer]
330type=ExeTracer
331eventq_index=0
332
333[system.cpu.workload]
334type=LiveProcess
335cmd=tests/test-progs/hello/bin/arm/linux/hello
336cwd=
337drivers=
338egid=100
339env=
340errout=cerr
341euid=100
342eventq_index=0
343executable=
344gid=100
345input=cin
346kvmInSE=false
347max_stack_size=67108864
348output=cout
349pid=100
350ppid=99
351simpoint=0
352system=system
353uid=100
354useArchPT=false
355
356[system.dvfs_handler]
357type=DVFSHandler
358domains=

--- 33 unchanged lines hidden (view full) ---

392
393[system.l2cache]
394type=Cache
395children=tags
396addr_ranges=0:18446744073709551615:0:0:0:0
397assoc=8
398clk_domain=system.clk_domain
399clusivity=mostly_incl
400default_p_state=UNDEFINED
401demand_mshr_reserve=1
402eventq_index=0
403hit_latency=20
404is_read_only=false
405max_miss_count=0
406mshrs=20
407p_state_clk_gate_bins=20
408p_state_clk_gate_max=1000000000000
409p_state_clk_gate_min=1000
410power_model=Null
411prefetch_on_access=false
412prefetcher=Null
413response_latency=20
414sequential_access=false
415size=262144
416system=system
417tags=system.l2cache.tags
418tgts_per_mshr=12
419write_buffers=8
420writeback_clean=false
421cpu_side=system.l2bus.master[0]
422mem_side=system.membus.slave[0]
423
424[system.l2cache.tags]
425type=LRU
426assoc=8
427block_size=64
428clk_domain=system.clk_domain
429default_p_state=UNDEFINED
430eventq_index=0
431hit_latency=20
432p_state_clk_gate_bins=20
433p_state_clk_gate_max=1000000000000
434p_state_clk_gate_min=1000
435power_model=Null
436sequential_access=false
437size=262144
438
439[system.mem_ctrl]
440type=DRAMCtrl
441IDD0=0.055000
442IDD02=0.000000
443IDD2N=0.032000
444IDD2N2=0.000000
445IDD2P0=0.000000

--- 105 unchanged lines hidden ---