| stats.txt (11502:e273e86a873d) | stats.txt (11530:6e143fd2cabf) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000026 # Number of seconds simulated 4sim_ticks 25580500 # Number of ticks simulated 5final_tick 25580500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000026 # Number of seconds simulated 4sim_ticks 25580500 # Number of ticks simulated 5final_tick 25580500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 119260 # Simulator instruction rate (inst/s) 8host_op_rate 119247 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 238851205 # Simulator tick rate (ticks/s) 10host_mem_usage 249876 # Number of bytes of host memory used 11host_seconds 0.11 # Real time elapsed on the host | 7host_inst_rate 131467 # Simulator instruction rate (inst/s) 8host_op_rate 131454 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 263302304 # Simulator tick rate (ticks/s) 10host_mem_usage 296128 # Number of bytes of host memory used 11host_seconds 0.10 # Real time elapsed on the host |
| 12sim_insts 12770 # Number of instructions simulated 13sim_ops 12770 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks | 12sim_insts 12770 # Number of instructions simulated 13sim_ops 12770 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks |
| 16system.physmem.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 16system.physmem.bytes_read::cpu.inst 39680 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 21824 # Number of bytes read from this memory 18system.physmem.bytes_read::total 61504 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 39680 # Number of instructions bytes read from this memory 20system.physmem.bytes_inst_read::total 39680 # Number of instructions bytes read from this memory 21system.physmem.num_reads::cpu.inst 620 # Number of read requests responded to by this memory 22system.physmem.num_reads::cpu.data 341 # Number of read requests responded to by this memory 23system.physmem.num_reads::total 961 # Number of read requests responded to by this memory --- 221 unchanged lines hidden (view full) --- 245system.physmem_1.preBackEnergy 246750 # Energy for precharge background per rank (pJ) 246system.physmem_1.totalEnergy 21463005 # Total energy per rank (pJ) 247system.physmem_1.averagePower 908.727388 # Core power per rank (mW) 248system.physmem_1.memoryStateTime::IDLE 326750 # Time in different power states 249system.physmem_1.memoryStateTime::REF 780000 # Time in different power states 250system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states 251system.physmem_1.memoryStateTime::ACT 22525750 # Time in different power states 252system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states | 17system.physmem.bytes_read::cpu.inst 39680 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 21824 # Number of bytes read from this memory 19system.physmem.bytes_read::total 61504 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 39680 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 39680 # Number of instructions bytes read from this memory 22system.physmem.num_reads::cpu.inst 620 # Number of read requests responded to by this memory 23system.physmem.num_reads::cpu.data 341 # Number of read requests responded to by this memory 24system.physmem.num_reads::total 961 # Number of read requests responded to by this memory --- 221 unchanged lines hidden (view full) --- 246system.physmem_1.preBackEnergy 246750 # Energy for precharge background per rank (pJ) 247system.physmem_1.totalEnergy 21463005 # Total energy per rank (pJ) 248system.physmem_1.averagePower 908.727388 # Core power per rank (mW) 249system.physmem_1.memoryStateTime::IDLE 326750 # Time in different power states 250system.physmem_1.memoryStateTime::REF 780000 # Time in different power states 251system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states 252system.physmem_1.memoryStateTime::ACT 22525750 # Time in different power states 253system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states |
| 254system.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 253system.cpu.branchPred.lookups 4883 # Number of BP lookups 254system.cpu.branchPred.condPredicted 2924 # Number of conditional branches predicted 255system.cpu.branchPred.condIncorrect 790 # Number of conditional branches incorrect 256system.cpu.branchPred.BTBLookups 3812 # Number of BTB lookups 257system.cpu.branchPred.BTBHits 1143 # Number of BTB hits 258system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. 259system.cpu.branchPred.BTBHitPct 29.984260 # BTB Hit Percentage 260system.cpu.branchPred.usedRAS 681 # Number of times the RAS was used to get a target. --- 32 unchanged lines hidden (view full) --- 293system.cpu.itb.write_acv 0 # DTB write access violations 294system.cpu.itb.write_accesses 0 # DTB write accesses 295system.cpu.itb.data_hits 0 # DTB hits 296system.cpu.itb.data_misses 0 # DTB misses 297system.cpu.itb.data_acv 0 # DTB access violations 298system.cpu.itb.data_accesses 0 # DTB accesses 299system.cpu.workload0.num_syscalls 17 # Number of system calls 300system.cpu.workload1.num_syscalls 17 # Number of system calls | 255system.cpu.branchPred.lookups 4883 # Number of BP lookups 256system.cpu.branchPred.condPredicted 2924 # Number of conditional branches predicted 257system.cpu.branchPred.condIncorrect 790 # Number of conditional branches incorrect 258system.cpu.branchPred.BTBLookups 3812 # Number of BTB lookups 259system.cpu.branchPred.BTBHits 1143 # Number of BTB hits 260system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. 261system.cpu.branchPred.BTBHitPct 29.984260 # BTB Hit Percentage 262system.cpu.branchPred.usedRAS 681 # Number of times the RAS was used to get a target. --- 32 unchanged lines hidden (view full) --- 295system.cpu.itb.write_acv 0 # DTB write access violations 296system.cpu.itb.write_accesses 0 # DTB write accesses 297system.cpu.itb.data_hits 0 # DTB hits 298system.cpu.itb.data_misses 0 # DTB misses 299system.cpu.itb.data_acv 0 # DTB access violations 300system.cpu.itb.data_accesses 0 # DTB accesses 301system.cpu.workload0.num_syscalls 17 # Number of system calls 302system.cpu.workload1.num_syscalls 17 # Number of system calls |
| 303system.cpu.pwrStateResidencyTicks::ON 25580500 # Cumulative time (in ticks) in various power states |
|
| 301system.cpu.numCycles 51162 # number of cpu cycles simulated 302system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 303system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 304system.cpu.fetch.icacheStallCycles 749 # Number of cycles fetch is stalled on an Icache miss 305system.cpu.fetch.Insts 28166 # Number of instructions fetch has processed 306system.cpu.fetch.Branches 4883 # Number of branches that fetch encountered 307system.cpu.fetch.predictedBranches 1974 # Number of branches that fetch has predicted taken 308system.cpu.fetch.Cycles 9785 # Number of cycles fetch has run and was not squashing or blocked --- 414 unchanged lines hidden (view full) --- 723system.cpu.ipc::1 0.124800 # IPC: Instructions Per Cycle 724system.cpu.ipc_total 0.249599 # IPC: Total IPC of All Threads 725system.cpu.int_regfile_reads 23495 # number of integer regfile reads 726system.cpu.int_regfile_writes 13160 # number of integer regfile writes 727system.cpu.fp_regfile_reads 16 # number of floating regfile reads 728system.cpu.fp_regfile_writes 4 # number of floating regfile writes 729system.cpu.misc_regfile_reads 2 # number of misc regfile reads 730system.cpu.misc_regfile_writes 2 # number of misc regfile writes | 304system.cpu.numCycles 51162 # number of cpu cycles simulated 305system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 306system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 307system.cpu.fetch.icacheStallCycles 749 # Number of cycles fetch is stalled on an Icache miss 308system.cpu.fetch.Insts 28166 # Number of instructions fetch has processed 309system.cpu.fetch.Branches 4883 # Number of branches that fetch encountered 310system.cpu.fetch.predictedBranches 1974 # Number of branches that fetch has predicted taken 311system.cpu.fetch.Cycles 9785 # Number of cycles fetch has run and was not squashing or blocked --- 414 unchanged lines hidden (view full) --- 726system.cpu.ipc::1 0.124800 # IPC: Instructions Per Cycle 727system.cpu.ipc_total 0.249599 # IPC: Total IPC of All Threads 728system.cpu.int_regfile_reads 23495 # number of integer regfile reads 729system.cpu.int_regfile_writes 13160 # number of integer regfile writes 730system.cpu.fp_regfile_reads 16 # number of floating regfile reads 731system.cpu.fp_regfile_writes 4 # number of floating regfile writes 732system.cpu.misc_regfile_reads 2 # number of misc regfile reads 733system.cpu.misc_regfile_writes 2 # number of misc regfile writes |
| 734system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 731system.cpu.dcache.tags.replacements::0 0 # number of replacements 732system.cpu.dcache.tags.replacements::1 0 # number of replacements 733system.cpu.dcache.tags.replacements::total 0 # number of replacements 734system.cpu.dcache.tags.tagsinuse 216.394211 # Cycle average of tags in use 735system.cpu.dcache.tags.total_refs 4263 # Total number of references to valid blocks. 736system.cpu.dcache.tags.sampled_refs 341 # Sample count of references to valid blocks. 737system.cpu.dcache.tags.avg_refs 12.501466 # Average number of references to valid blocks. 738system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 739system.cpu.dcache.tags.occ_blocks::cpu.data 216.394211 # Average occupied blocks per requestor 740system.cpu.dcache.tags.occ_percent::cpu.data 0.052831 # Average percentage of cache occupancy 741system.cpu.dcache.tags.occ_percent::total 0.052831 # Average percentage of cache occupancy 742system.cpu.dcache.tags.occ_task_id_blocks::1024 341 # Occupied blocks per task id 743system.cpu.dcache.tags.age_task_id_blocks_1024::0 72 # Occupied blocks per task id 744system.cpu.dcache.tags.age_task_id_blocks_1024::1 269 # Occupied blocks per task id 745system.cpu.dcache.tags.occ_task_id_percent::1024 0.083252 # Percentage of cache occupancy per task id 746system.cpu.dcache.tags.tag_accesses 10889 # Number of tag accesses 747system.cpu.dcache.tags.data_accesses 10889 # Number of data accesses | 735system.cpu.dcache.tags.replacements::0 0 # number of replacements 736system.cpu.dcache.tags.replacements::1 0 # number of replacements 737system.cpu.dcache.tags.replacements::total 0 # number of replacements 738system.cpu.dcache.tags.tagsinuse 216.394211 # Cycle average of tags in use 739system.cpu.dcache.tags.total_refs 4263 # Total number of references to valid blocks. 740system.cpu.dcache.tags.sampled_refs 341 # Sample count of references to valid blocks. 741system.cpu.dcache.tags.avg_refs 12.501466 # Average number of references to valid blocks. 742system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 743system.cpu.dcache.tags.occ_blocks::cpu.data 216.394211 # Average occupied blocks per requestor 744system.cpu.dcache.tags.occ_percent::cpu.data 0.052831 # Average percentage of cache occupancy 745system.cpu.dcache.tags.occ_percent::total 0.052831 # Average percentage of cache occupancy 746system.cpu.dcache.tags.occ_task_id_blocks::1024 341 # Occupied blocks per task id 747system.cpu.dcache.tags.age_task_id_blocks_1024::0 72 # Occupied blocks per task id 748system.cpu.dcache.tags.age_task_id_blocks_1024::1 269 # Occupied blocks per task id 749system.cpu.dcache.tags.occ_task_id_percent::1024 0.083252 # Percentage of cache occupancy per task id 750system.cpu.dcache.tags.tag_accesses 10889 # Number of tag accesses 751system.cpu.dcache.tags.data_accesses 10889 # Number of data accesses |
| 752system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 748system.cpu.dcache.ReadReq_hits::cpu.data 3245 # number of ReadReq hits 749system.cpu.dcache.ReadReq_hits::total 3245 # number of ReadReq hits 750system.cpu.dcache.WriteReq_hits::cpu.data 1018 # number of WriteReq hits 751system.cpu.dcache.WriteReq_hits::total 1018 # number of WriteReq hits 752system.cpu.dcache.demand_hits::cpu.data 4263 # number of demand (read+write) hits 753system.cpu.dcache.demand_hits::total 4263 # number of demand (read+write) hits 754system.cpu.dcache.overall_hits::cpu.data 4263 # number of overall hits 755system.cpu.dcache.overall_hits::total 4263 # number of overall hits --- 78 unchanged lines hidden (view full) --- 834system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 87926.020408 # average ReadReq mshr miss latency 835system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 87926.020408 # average ReadReq mshr miss latency 836system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 87849.219178 # average WriteReq mshr miss latency 837system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 87849.219178 # average WriteReq mshr miss latency 838system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 87893.233918 # average overall mshr miss latency 839system.cpu.dcache.demand_avg_mshr_miss_latency::total 87893.233918 # average overall mshr miss latency 840system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 87893.233918 # average overall mshr miss latency 841system.cpu.dcache.overall_avg_mshr_miss_latency::total 87893.233918 # average overall mshr miss latency | 753system.cpu.dcache.ReadReq_hits::cpu.data 3245 # number of ReadReq hits 754system.cpu.dcache.ReadReq_hits::total 3245 # number of ReadReq hits 755system.cpu.dcache.WriteReq_hits::cpu.data 1018 # number of WriteReq hits 756system.cpu.dcache.WriteReq_hits::total 1018 # number of WriteReq hits 757system.cpu.dcache.demand_hits::cpu.data 4263 # number of demand (read+write) hits 758system.cpu.dcache.demand_hits::total 4263 # number of demand (read+write) hits 759system.cpu.dcache.overall_hits::cpu.data 4263 # number of overall hits 760system.cpu.dcache.overall_hits::total 4263 # number of overall hits --- 78 unchanged lines hidden (view full) --- 839system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 87926.020408 # average ReadReq mshr miss latency 840system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 87926.020408 # average ReadReq mshr miss latency 841system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 87849.219178 # average WriteReq mshr miss latency 842system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 87849.219178 # average WriteReq mshr miss latency 843system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 87893.233918 # average overall mshr miss latency 844system.cpu.dcache.demand_avg_mshr_miss_latency::total 87893.233918 # average overall mshr miss latency 845system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 87893.233918 # average overall mshr miss latency 846system.cpu.dcache.overall_avg_mshr_miss_latency::total 87893.233918 # average overall mshr miss latency |
| 847system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 842system.cpu.icache.tags.replacements::0 7 # number of replacements 843system.cpu.icache.tags.replacements::1 0 # number of replacements 844system.cpu.icache.tags.replacements::total 7 # number of replacements 845system.cpu.icache.tags.tagsinuse 317.276824 # Cycle average of tags in use 846system.cpu.icache.tags.total_refs 2916 # Total number of references to valid blocks. 847system.cpu.icache.tags.sampled_refs 623 # Sample count of references to valid blocks. 848system.cpu.icache.tags.avg_refs 4.680578 # Average number of references to valid blocks. 849system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 850system.cpu.icache.tags.occ_blocks::cpu.inst 317.276824 # Average occupied blocks per requestor 851system.cpu.icache.tags.occ_percent::cpu.inst 0.154920 # Average percentage of cache occupancy 852system.cpu.icache.tags.occ_percent::total 0.154920 # Average percentage of cache occupancy 853system.cpu.icache.tags.occ_task_id_blocks::1024 616 # Occupied blocks per task id 854system.cpu.icache.tags.age_task_id_blocks_1024::0 237 # Occupied blocks per task id 855system.cpu.icache.tags.age_task_id_blocks_1024::1 379 # Occupied blocks per task id 856system.cpu.icache.tags.occ_task_id_percent::1024 0.300781 # Percentage of cache occupancy per task id 857system.cpu.icache.tags.tag_accesses 8261 # Number of tag accesses 858system.cpu.icache.tags.data_accesses 8261 # Number of data accesses | 848system.cpu.icache.tags.replacements::0 7 # number of replacements 849system.cpu.icache.tags.replacements::1 0 # number of replacements 850system.cpu.icache.tags.replacements::total 7 # number of replacements 851system.cpu.icache.tags.tagsinuse 317.276824 # Cycle average of tags in use 852system.cpu.icache.tags.total_refs 2916 # Total number of references to valid blocks. 853system.cpu.icache.tags.sampled_refs 623 # Sample count of references to valid blocks. 854system.cpu.icache.tags.avg_refs 4.680578 # Average number of references to valid blocks. 855system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 856system.cpu.icache.tags.occ_blocks::cpu.inst 317.276824 # Average occupied blocks per requestor 857system.cpu.icache.tags.occ_percent::cpu.inst 0.154920 # Average percentage of cache occupancy 858system.cpu.icache.tags.occ_percent::total 0.154920 # Average percentage of cache occupancy 859system.cpu.icache.tags.occ_task_id_blocks::1024 616 # Occupied blocks per task id 860system.cpu.icache.tags.age_task_id_blocks_1024::0 237 # Occupied blocks per task id 861system.cpu.icache.tags.age_task_id_blocks_1024::1 379 # Occupied blocks per task id 862system.cpu.icache.tags.occ_task_id_percent::1024 0.300781 # Percentage of cache occupancy per task id 863system.cpu.icache.tags.tag_accesses 8261 # Number of tag accesses 864system.cpu.icache.tags.data_accesses 8261 # Number of data accesses |
| 865system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 859system.cpu.icache.ReadReq_hits::cpu.inst 2916 # number of ReadReq hits 860system.cpu.icache.ReadReq_hits::total 2916 # number of ReadReq hits 861system.cpu.icache.demand_hits::cpu.inst 2916 # number of demand (read+write) hits 862system.cpu.icache.demand_hits::total 2916 # number of demand (read+write) hits 863system.cpu.icache.overall_hits::cpu.inst 2916 # number of overall hits 864system.cpu.icache.overall_hits::total 2916 # number of overall hits 865system.cpu.icache.ReadReq_misses::cpu.inst 903 # number of ReadReq misses 866system.cpu.icache.ReadReq_misses::total 903 # number of ReadReq misses --- 58 unchanged lines hidden (view full) --- 925system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.163132 # mshr miss rate for overall accesses 926system.cpu.icache.overall_mshr_miss_rate::total 0.163132 # mshr miss rate for overall accesses 927system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 80906.894061 # average ReadReq mshr miss latency 928system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 80906.894061 # average ReadReq mshr miss latency 929system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 80906.894061 # average overall mshr miss latency 930system.cpu.icache.demand_avg_mshr_miss_latency::total 80906.894061 # average overall mshr miss latency 931system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 80906.894061 # average overall mshr miss latency 932system.cpu.icache.overall_avg_mshr_miss_latency::total 80906.894061 # average overall mshr miss latency | 866system.cpu.icache.ReadReq_hits::cpu.inst 2916 # number of ReadReq hits 867system.cpu.icache.ReadReq_hits::total 2916 # number of ReadReq hits 868system.cpu.icache.demand_hits::cpu.inst 2916 # number of demand (read+write) hits 869system.cpu.icache.demand_hits::total 2916 # number of demand (read+write) hits 870system.cpu.icache.overall_hits::cpu.inst 2916 # number of overall hits 871system.cpu.icache.overall_hits::total 2916 # number of overall hits 872system.cpu.icache.ReadReq_misses::cpu.inst 903 # number of ReadReq misses 873system.cpu.icache.ReadReq_misses::total 903 # number of ReadReq misses --- 58 unchanged lines hidden (view full) --- 932system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.163132 # mshr miss rate for overall accesses 933system.cpu.icache.overall_mshr_miss_rate::total 0.163132 # mshr miss rate for overall accesses 934system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 80906.894061 # average ReadReq mshr miss latency 935system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 80906.894061 # average ReadReq mshr miss latency 936system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 80906.894061 # average overall mshr miss latency 937system.cpu.icache.demand_avg_mshr_miss_latency::total 80906.894061 # average overall mshr miss latency 938system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 80906.894061 # average overall mshr miss latency 939system.cpu.icache.overall_avg_mshr_miss_latency::total 80906.894061 # average overall mshr miss latency |
| 940system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 933system.cpu.l2cache.tags.replacements::0 0 # number of replacements 934system.cpu.l2cache.tags.replacements::1 0 # number of replacements 935system.cpu.l2cache.tags.replacements::total 0 # number of replacements 936system.cpu.l2cache.tags.tagsinuse 438.773475 # Cycle average of tags in use 937system.cpu.l2cache.tags.total_refs 10 # Total number of references to valid blocks. 938system.cpu.l2cache.tags.sampled_refs 815 # Sample count of references to valid blocks. 939system.cpu.l2cache.tags.avg_refs 0.012270 # Average number of references to valid blocks. 940system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 941system.cpu.l2cache.tags.occ_blocks::cpu.inst 317.771557 # Average occupied blocks per requestor 942system.cpu.l2cache.tags.occ_blocks::cpu.data 121.001918 # Average occupied blocks per requestor 943system.cpu.l2cache.tags.occ_percent::cpu.inst 0.009698 # Average percentage of cache occupancy 944system.cpu.l2cache.tags.occ_percent::cpu.data 0.003693 # Average percentage of cache occupancy 945system.cpu.l2cache.tags.occ_percent::total 0.013390 # Average percentage of cache occupancy 946system.cpu.l2cache.tags.occ_task_id_blocks::1024 815 # Occupied blocks per task id 947system.cpu.l2cache.tags.age_task_id_blocks_1024::0 286 # Occupied blocks per task id 948system.cpu.l2cache.tags.age_task_id_blocks_1024::1 529 # Occupied blocks per task id 949system.cpu.l2cache.tags.occ_task_id_percent::1024 0.024872 # Percentage of cache occupancy per task id 950system.cpu.l2cache.tags.tag_accesses 8737 # Number of tag accesses 951system.cpu.l2cache.tags.data_accesses 8737 # Number of data accesses | 941system.cpu.l2cache.tags.replacements::0 0 # number of replacements 942system.cpu.l2cache.tags.replacements::1 0 # number of replacements 943system.cpu.l2cache.tags.replacements::total 0 # number of replacements 944system.cpu.l2cache.tags.tagsinuse 438.773475 # Cycle average of tags in use 945system.cpu.l2cache.tags.total_refs 10 # Total number of references to valid blocks. 946system.cpu.l2cache.tags.sampled_refs 815 # Sample count of references to valid blocks. 947system.cpu.l2cache.tags.avg_refs 0.012270 # Average number of references to valid blocks. 948system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 949system.cpu.l2cache.tags.occ_blocks::cpu.inst 317.771557 # Average occupied blocks per requestor 950system.cpu.l2cache.tags.occ_blocks::cpu.data 121.001918 # Average occupied blocks per requestor 951system.cpu.l2cache.tags.occ_percent::cpu.inst 0.009698 # Average percentage of cache occupancy 952system.cpu.l2cache.tags.occ_percent::cpu.data 0.003693 # Average percentage of cache occupancy 953system.cpu.l2cache.tags.occ_percent::total 0.013390 # Average percentage of cache occupancy 954system.cpu.l2cache.tags.occ_task_id_blocks::1024 815 # Occupied blocks per task id 955system.cpu.l2cache.tags.age_task_id_blocks_1024::0 286 # Occupied blocks per task id 956system.cpu.l2cache.tags.age_task_id_blocks_1024::1 529 # Occupied blocks per task id 957system.cpu.l2cache.tags.occ_task_id_percent::1024 0.024872 # Percentage of cache occupancy per task id 958system.cpu.l2cache.tags.tag_accesses 8737 # Number of tag accesses 959system.cpu.l2cache.tags.data_accesses 8737 # Number of data accesses |
| 960system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
|
| 952system.cpu.l2cache.WritebackClean_hits::writebacks 7 # number of WritebackClean hits 953system.cpu.l2cache.WritebackClean_hits::total 7 # number of WritebackClean hits 954system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 3 # number of ReadCleanReq hits 955system.cpu.l2cache.ReadCleanReq_hits::total 3 # number of ReadCleanReq hits 956system.cpu.l2cache.demand_hits::cpu.inst 3 # number of demand (read+write) hits 957system.cpu.l2cache.demand_hits::total 3 # number of demand (read+write) hits 958system.cpu.l2cache.overall_hits::cpu.inst 3 # number of overall hits 959system.cpu.l2cache.overall_hits::total 3 # number of overall hits --- 114 unchanged lines hidden (view full) --- 1074system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 76372.807018 # average overall mshr miss latency 1075system.cpu.l2cache.overall_avg_mshr_miss_latency::total 72090.956341 # average overall mshr miss latency 1076system.cpu.toL2Bus.snoop_filter.tot_requests 972 # Total number of requests made to the snoop filter. 1077system.cpu.toL2Bus.snoop_filter.hit_single_requests 9 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1078system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 1079system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 1080system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1081system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 961system.cpu.l2cache.WritebackClean_hits::writebacks 7 # number of WritebackClean hits 962system.cpu.l2cache.WritebackClean_hits::total 7 # number of WritebackClean hits 963system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 3 # number of ReadCleanReq hits 964system.cpu.l2cache.ReadCleanReq_hits::total 3 # number of ReadCleanReq hits 965system.cpu.l2cache.demand_hits::cpu.inst 3 # number of demand (read+write) hits 966system.cpu.l2cache.demand_hits::total 3 # number of demand (read+write) hits 967system.cpu.l2cache.overall_hits::cpu.inst 3 # number of overall hits 968system.cpu.l2cache.overall_hits::total 3 # number of overall hits --- 114 unchanged lines hidden (view full) --- 1083system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 76372.807018 # average overall mshr miss latency 1084system.cpu.l2cache.overall_avg_mshr_miss_latency::total 72090.956341 # average overall mshr miss latency 1085system.cpu.toL2Bus.snoop_filter.tot_requests 972 # Total number of requests made to the snoop filter. 1086system.cpu.toL2Bus.snoop_filter.hit_single_requests 9 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1087system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 1088system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 1089system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1090system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 1091system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
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| 1082system.cpu.toL2Bus.trans_dist::ReadResp 818 # Transaction distribution 1083system.cpu.toL2Bus.trans_dist::WritebackClean 7 # Transaction distribution 1084system.cpu.toL2Bus.trans_dist::ReadExReq 146 # Transaction distribution 1085system.cpu.toL2Bus.trans_dist::ReadExResp 146 # Transaction distribution 1086system.cpu.toL2Bus.trans_dist::ReadCleanReq 623 # Transaction distribution 1087system.cpu.toL2Bus.trans_dist::ReadSharedReq 196 # Transaction distribution 1088system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1253 # Packet count per connected master and slave (bytes) 1089system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 683 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 1104system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram 1105system.cpu.toL2Bus.snoop_fanout::total 965 # Request fanout histogram 1106system.cpu.toL2Bus.reqLayer0.occupancy 493000 # Layer occupancy (ticks) 1107system.cpu.toL2Bus.reqLayer0.utilization 1.9 # Layer utilization (%) 1108system.cpu.toL2Bus.respLayer0.occupancy 934500 # Layer occupancy (ticks) 1109system.cpu.toL2Bus.respLayer0.utilization 3.7 # Layer utilization (%) 1110system.cpu.toL2Bus.respLayer1.occupancy 511500 # Layer occupancy (ticks) 1111system.cpu.toL2Bus.respLayer1.utilization 2.0 # Layer utilization (%) | 1092system.cpu.toL2Bus.trans_dist::ReadResp 818 # Transaction distribution 1093system.cpu.toL2Bus.trans_dist::WritebackClean 7 # Transaction distribution 1094system.cpu.toL2Bus.trans_dist::ReadExReq 146 # Transaction distribution 1095system.cpu.toL2Bus.trans_dist::ReadExResp 146 # Transaction distribution 1096system.cpu.toL2Bus.trans_dist::ReadCleanReq 623 # Transaction distribution 1097system.cpu.toL2Bus.trans_dist::ReadSharedReq 196 # Transaction distribution 1098system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1253 # Packet count per connected master and slave (bytes) 1099system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 683 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 1114system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram 1115system.cpu.toL2Bus.snoop_fanout::total 965 # Request fanout histogram 1116system.cpu.toL2Bus.reqLayer0.occupancy 493000 # Layer occupancy (ticks) 1117system.cpu.toL2Bus.reqLayer0.utilization 1.9 # Layer utilization (%) 1118system.cpu.toL2Bus.respLayer0.occupancy 934500 # Layer occupancy (ticks) 1119system.cpu.toL2Bus.respLayer0.utilization 3.7 # Layer utilization (%) 1120system.cpu.toL2Bus.respLayer1.occupancy 511500 # Layer occupancy (ticks) 1121system.cpu.toL2Bus.respLayer1.utilization 2.0 # Layer utilization (%) |
| 1122system.membus.pwrStateResidencyTicks::UNDEFINED 25580500 # Cumulative time (in ticks) in various power states |
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| 1112system.membus.trans_dist::ReadResp 815 # Transaction distribution 1113system.membus.trans_dist::ReadExReq 146 # Transaction distribution 1114system.membus.trans_dist::ReadExResp 146 # Transaction distribution 1115system.membus.trans_dist::ReadSharedReq 816 # Transaction distribution 1116system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1923 # Packet count per connected master and slave (bytes) 1117system.membus.pkt_count::total 1923 # Packet count per connected master and slave (bytes) 1118system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 61504 # Cumulative packet size per connected master and slave (bytes) 1119system.membus.pkt_size::total 61504 # Cumulative packet size per connected master and slave (bytes) --- 17 unchanged lines hidden --- | 1123system.membus.trans_dist::ReadResp 815 # Transaction distribution 1124system.membus.trans_dist::ReadExReq 146 # Transaction distribution 1125system.membus.trans_dist::ReadExResp 146 # Transaction distribution 1126system.membus.trans_dist::ReadSharedReq 816 # Transaction distribution 1127system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1923 # Packet count per connected master and slave (bytes) 1128system.membus.pkt_count::total 1923 # Packet count per connected master and slave (bytes) 1129system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 61504 # Cumulative packet size per connected master and slave (bytes) 1130system.membus.pkt_size::total 61504 # Cumulative packet size per connected master and slave (bytes) --- 17 unchanged lines hidden --- |