1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 163 unchanged lines hidden (view full) ---
172
173[system.cpu.dcache]
174type=Cache
175children=tags
176addr_ranges=0:18446744073709551615:0:0:0:0
177assoc=2
178clk_domain=system.cpu_clk_domain
179clusivity=mostly_incl
180default_p_state=UNDEFINED
181demand_mshr_reserve=1
182eventq_index=0
183hit_latency=2
184is_read_only=false
185max_miss_count=0
186mshrs=4
187p_state_clk_gate_bins=20
188p_state_clk_gate_max=1000000000000
189p_state_clk_gate_min=1000
190power_model=Null
191prefetch_on_access=false
192prefetcher=Null
193response_latency=2
194sequential_access=false
195size=262144
196system=system
197tags=system.cpu.dcache.tags
198tgts_per_mshr=20
199write_buffers=8
200writeback_clean=false
201cpu_side=system.cpu.dcache_port
202mem_side=system.cpu.toL2Bus.slave[1]
203
204[system.cpu.dcache.tags]
205type=LRU
206assoc=2
207block_size=64
208clk_domain=system.cpu_clk_domain
209default_p_state=UNDEFINED
210eventq_index=0
211hit_latency=2
212p_state_clk_gate_bins=20
213p_state_clk_gate_max=1000000000000
214p_state_clk_gate_min=1000
215power_model=Null
216sequential_access=false
217size=262144
218
219[system.cpu.dtb]
220type=AlphaTLB
221eventq_index=0
222size=64
223
224[system.cpu.fuPool]
225type=FUPool
--- 61 unchanged lines hidden (view full) ---
287type=OpDesc
288eventq_index=0
289opClass=FloatCvt
290opLat=2
291pipelined=true
292
293[system.cpu.fuPool.FUList3]
294type=FUDesc
295children=opList0 opList1 opList2
296count=2
297eventq_index=0
298opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
299
300[system.cpu.fuPool.FUList3.opList0]
301type=OpDesc
302eventq_index=0
303opClass=FloatMult
304opLat=4
305pipelined=true
306
307[system.cpu.fuPool.FUList3.opList1]
308type=OpDesc
309eventq_index=0
310opClass=FloatDiv
311opLat=12
312pipelined=false
313
314[system.cpu.fuPool.FUList3.opList2]
315type=OpDesc
316eventq_index=0
317opClass=FloatSqrt
318opLat=24
319pipelined=false
320
321[system.cpu.fuPool.FUList4]
322type=FUDesc
323children=opList
324count=0
325eventq_index=0
326opList=system.cpu.fuPool.FUList4.opList
327
328[system.cpu.fuPool.FUList4.opList]
329type=OpDesc
330eventq_index=0
331opClass=MemRead
332opLat=1
333pipelined=true
334
335[system.cpu.fuPool.FUList5]
336type=FUDesc
337children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
338count=4
339eventq_index=0
340opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
341
342[system.cpu.fuPool.FUList5.opList00]
--- 133 unchanged lines hidden (view full) ---
476type=OpDesc
477eventq_index=0
478opClass=SimdFloatSqrt
479opLat=1
480pipelined=true
481
482[system.cpu.fuPool.FUList6]
483type=FUDesc
484children=opList
485count=0
486eventq_index=0
487opList=system.cpu.fuPool.FUList6.opList
488
489[system.cpu.fuPool.FUList6.opList]
490type=OpDesc
491eventq_index=0
492opClass=MemWrite
493opLat=1
494pipelined=true
495
496[system.cpu.fuPool.FUList7]
497type=FUDesc
498children=opList0 opList1
499count=4
500eventq_index=0
501opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
502
503[system.cpu.fuPool.FUList7.opList0]
504type=OpDesc
505eventq_index=0
506opClass=MemRead
507opLat=1
508pipelined=true
509
510[system.cpu.fuPool.FUList7.opList1]
511type=OpDesc
512eventq_index=0
513opClass=MemWrite
514opLat=1
515pipelined=true
516
517[system.cpu.fuPool.FUList8]
518type=FUDesc
519children=opList
520count=1
521eventq_index=0
522opList=system.cpu.fuPool.FUList8.opList
523
524[system.cpu.fuPool.FUList8.opList]
--- 5 unchanged lines hidden (view full) ---
530
531[system.cpu.icache]
532type=Cache
533children=tags
534addr_ranges=0:18446744073709551615:0:0:0:0
535assoc=2
536clk_domain=system.cpu_clk_domain
537clusivity=mostly_incl
538default_p_state=UNDEFINED
539demand_mshr_reserve=1
540eventq_index=0
541hit_latency=2
542is_read_only=true
543max_miss_count=0
544mshrs=4
545p_state_clk_gate_bins=20
546p_state_clk_gate_max=1000000000000
547p_state_clk_gate_min=1000
548power_model=Null
549prefetch_on_access=false
550prefetcher=Null
551response_latency=2
552sequential_access=false
553size=131072
554system=system
555tags=system.cpu.icache.tags
556tgts_per_mshr=20
557write_buffers=8
558writeback_clean=true
559cpu_side=system.cpu.icache_port
560mem_side=system.cpu.toL2Bus.slave[0]
561
562[system.cpu.icache.tags]
563type=LRU
564assoc=2
565block_size=64
566clk_domain=system.cpu_clk_domain
567default_p_state=UNDEFINED
568eventq_index=0
569hit_latency=2
570p_state_clk_gate_bins=20
571p_state_clk_gate_max=1000000000000
572p_state_clk_gate_min=1000
573power_model=Null
574sequential_access=false
575size=131072
576
577[system.cpu.interrupts0]
578type=AlphaInterrupts
579eventq_index=0
580
581[system.cpu.interrupts1]
582type=AlphaInterrupts
583eventq_index=0
--- 15 unchanged lines hidden (view full) ---
599
600[system.cpu.l2cache]
601type=Cache
602children=tags
603addr_ranges=0:18446744073709551615:0:0:0:0
604assoc=8
605clk_domain=system.cpu_clk_domain
606clusivity=mostly_incl
607default_p_state=UNDEFINED
608demand_mshr_reserve=1
609eventq_index=0
610hit_latency=20
611is_read_only=false
612max_miss_count=0
613mshrs=20
614p_state_clk_gate_bins=20
615p_state_clk_gate_max=1000000000000
616p_state_clk_gate_min=1000
617power_model=Null
618prefetch_on_access=false
619prefetcher=Null
620response_latency=20
621sequential_access=false
622size=2097152
623system=system
624tags=system.cpu.l2cache.tags
625tgts_per_mshr=12
626write_buffers=8
627writeback_clean=false
628cpu_side=system.cpu.toL2Bus.master[0]
629mem_side=system.membus.slave[1]
630
631[system.cpu.l2cache.tags]
632type=LRU
633assoc=8
634block_size=64
635clk_domain=system.cpu_clk_domain
636default_p_state=UNDEFINED
637eventq_index=0
638hit_latency=20
639p_state_clk_gate_bins=20
640p_state_clk_gate_max=1000000000000
641p_state_clk_gate_min=1000
642power_model=Null
643sequential_access=false
644size=2097152
645
646[system.cpu.toL2Bus]
647type=CoherentXBar
648children=snoop_filter
649clk_domain=system.cpu_clk_domain
650default_p_state=UNDEFINED
651eventq_index=0
652forward_latency=0
--- 28 unchanged lines hidden (view full) ---
681cmd=hello
682cwd=
683drivers=
684egid=100
685env=
686errout=cerr
687euid=100
688eventq_index=0
689executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/alpha/linux/hello
690gid=100
691input=cin
692kvmInSE=false
693max_stack_size=67108864
694output=cout
695pid=100
696ppid=99
697simpoint=0
--- 6 unchanged lines hidden (view full) ---
704cmd=hello
705cwd=
706drivers=
707egid=100
708env=
709errout=cerr
710euid=100
711eventq_index=0
712executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/alpha/linux/hello
713gid=100
714input=cin
715kvmInSE=false
716max_stack_size=67108864
717output=cout
718pid=100
719ppid=99
720simpoint=0
--- 137 unchanged lines hidden ---
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 163 unchanged lines hidden (view full) ---
172
173[system.cpu.dcache]
174type=Cache
175children=tags
176addr_ranges=0:18446744073709551615:0:0:0:0
177assoc=2
178clk_domain=system.cpu_clk_domain
179clusivity=mostly_incl
180default_p_state=UNDEFINED
181demand_mshr_reserve=1
182eventq_index=0
183hit_latency=2
184is_read_only=false
185max_miss_count=0
186mshrs=4
187p_state_clk_gate_bins=20
188p_state_clk_gate_max=1000000000000
189p_state_clk_gate_min=1000
190power_model=Null
191prefetch_on_access=false
192prefetcher=Null
193response_latency=2
194sequential_access=false
195size=262144
196system=system
197tags=system.cpu.dcache.tags
198tgts_per_mshr=20
199write_buffers=8
200writeback_clean=false
201cpu_side=system.cpu.dcache_port
202mem_side=system.cpu.toL2Bus.slave[1]
203
204[system.cpu.dcache.tags]
205type=LRU
206assoc=2
207block_size=64
208clk_domain=system.cpu_clk_domain
209default_p_state=UNDEFINED
210eventq_index=0
211hit_latency=2
212p_state_clk_gate_bins=20
213p_state_clk_gate_max=1000000000000
214p_state_clk_gate_min=1000
215power_model=Null
216sequential_access=false
217size=262144
218
219[system.cpu.dtb]
220type=AlphaTLB
221eventq_index=0
222size=64
223
224[system.cpu.fuPool]
225type=FUPool
--- 61 unchanged lines hidden (view full) ---
287type=OpDesc
288eventq_index=0
289opClass=FloatCvt
290opLat=2
291pipelined=true
292
293[system.cpu.fuPool.FUList3]
294type=FUDesc
295children=opList0 opList1 opList2
296count=2
297eventq_index=0
298opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
299
300[system.cpu.fuPool.FUList3.opList0]
301type=OpDesc
302eventq_index=0
303opClass=FloatMult
304opLat=4
305pipelined=true
306
307[system.cpu.fuPool.FUList3.opList1]
308type=OpDesc
309eventq_index=0
310opClass=FloatDiv
311opLat=12
312pipelined=false
313
314[system.cpu.fuPool.FUList3.opList2]
315type=OpDesc
316eventq_index=0
317opClass=FloatSqrt
318opLat=24
319pipelined=false
320
321[system.cpu.fuPool.FUList4]
322type=FUDesc
323children=opList
324count=0
325eventq_index=0
326opList=system.cpu.fuPool.FUList4.opList
327
328[system.cpu.fuPool.FUList4.opList]
329type=OpDesc
330eventq_index=0
331opClass=MemRead
332opLat=1
333pipelined=true
334
335[system.cpu.fuPool.FUList5]
336type=FUDesc
337children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
338count=4
339eventq_index=0
340opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
341
342[system.cpu.fuPool.FUList5.opList00]
--- 133 unchanged lines hidden (view full) ---
476type=OpDesc
477eventq_index=0
478opClass=SimdFloatSqrt
479opLat=1
480pipelined=true
481
482[system.cpu.fuPool.FUList6]
483type=FUDesc
484children=opList
485count=0
486eventq_index=0
487opList=system.cpu.fuPool.FUList6.opList
488
489[system.cpu.fuPool.FUList6.opList]
490type=OpDesc
491eventq_index=0
492opClass=MemWrite
493opLat=1
494pipelined=true
495
496[system.cpu.fuPool.FUList7]
497type=FUDesc
498children=opList0 opList1
499count=4
500eventq_index=0
501opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
502
503[system.cpu.fuPool.FUList7.opList0]
504type=OpDesc
505eventq_index=0
506opClass=MemRead
507opLat=1
508pipelined=true
509
510[system.cpu.fuPool.FUList7.opList1]
511type=OpDesc
512eventq_index=0
513opClass=MemWrite
514opLat=1
515pipelined=true
516
517[system.cpu.fuPool.FUList8]
518type=FUDesc
519children=opList
520count=1
521eventq_index=0
522opList=system.cpu.fuPool.FUList8.opList
523
524[system.cpu.fuPool.FUList8.opList]
--- 5 unchanged lines hidden (view full) ---
530
531[system.cpu.icache]
532type=Cache
533children=tags
534addr_ranges=0:18446744073709551615:0:0:0:0
535assoc=2
536clk_domain=system.cpu_clk_domain
537clusivity=mostly_incl
538default_p_state=UNDEFINED
539demand_mshr_reserve=1
540eventq_index=0
541hit_latency=2
542is_read_only=true
543max_miss_count=0
544mshrs=4
545p_state_clk_gate_bins=20
546p_state_clk_gate_max=1000000000000
547p_state_clk_gate_min=1000
548power_model=Null
549prefetch_on_access=false
550prefetcher=Null
551response_latency=2
552sequential_access=false
553size=131072
554system=system
555tags=system.cpu.icache.tags
556tgts_per_mshr=20
557write_buffers=8
558writeback_clean=true
559cpu_side=system.cpu.icache_port
560mem_side=system.cpu.toL2Bus.slave[0]
561
562[system.cpu.icache.tags]
563type=LRU
564assoc=2
565block_size=64
566clk_domain=system.cpu_clk_domain
567default_p_state=UNDEFINED
568eventq_index=0
569hit_latency=2
570p_state_clk_gate_bins=20
571p_state_clk_gate_max=1000000000000
572p_state_clk_gate_min=1000
573power_model=Null
574sequential_access=false
575size=131072
576
577[system.cpu.interrupts0]
578type=AlphaInterrupts
579eventq_index=0
580
581[system.cpu.interrupts1]
582type=AlphaInterrupts
583eventq_index=0
--- 15 unchanged lines hidden (view full) ---
599
600[system.cpu.l2cache]
601type=Cache
602children=tags
603addr_ranges=0:18446744073709551615:0:0:0:0
604assoc=8
605clk_domain=system.cpu_clk_domain
606clusivity=mostly_incl
607default_p_state=UNDEFINED
608demand_mshr_reserve=1
609eventq_index=0
610hit_latency=20
611is_read_only=false
612max_miss_count=0
613mshrs=20
614p_state_clk_gate_bins=20
615p_state_clk_gate_max=1000000000000
616p_state_clk_gate_min=1000
617power_model=Null
618prefetch_on_access=false
619prefetcher=Null
620response_latency=20
621sequential_access=false
622size=2097152
623system=system
624tags=system.cpu.l2cache.tags
625tgts_per_mshr=12
626write_buffers=8
627writeback_clean=false
628cpu_side=system.cpu.toL2Bus.master[0]
629mem_side=system.membus.slave[1]
630
631[system.cpu.l2cache.tags]
632type=LRU
633assoc=8
634block_size=64
635clk_domain=system.cpu_clk_domain
636default_p_state=UNDEFINED
637eventq_index=0
638hit_latency=20
639p_state_clk_gate_bins=20
640p_state_clk_gate_max=1000000000000
641p_state_clk_gate_min=1000
642power_model=Null
643sequential_access=false
644size=2097152
645
646[system.cpu.toL2Bus]
647type=CoherentXBar
648children=snoop_filter
649clk_domain=system.cpu_clk_domain
650default_p_state=UNDEFINED
651eventq_index=0
652forward_latency=0
--- 28 unchanged lines hidden (view full) ---
681cmd=hello
682cwd=
683drivers=
684egid=100
685env=
686errout=cerr
687euid=100
688eventq_index=0
689executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/alpha/linux/hello
690gid=100
691input=cin
692kvmInSE=false
693max_stack_size=67108864
694output=cout
695pid=100
696ppid=99
697simpoint=0
--- 6 unchanged lines hidden (view full) ---
704cmd=hello
705cwd=
706drivers=
707egid=100
708env=
709errout=cerr
710euid=100
711eventq_index=0
712executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/alpha/linux/hello
713gid=100
714input=cin
715kvmInSE=false
716max_stack_size=67108864
717output=cout
718pid=100
719ppid=99
720simpoint=0
--- 137 unchanged lines hidden ---