| config.ini (8835:7c68f84d7c4e) | config.ini (8983:8800b05e1cb3) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 |
| 19physmem=system.physmem | |
| 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 | 19readfile= 20symbolfile= 21work_begin_ckpt_count=0 22work_begin_cpu_id_exit=-1 23work_begin_exit_count=0 24work_cpus_ckpt_count=0 25work_end_ckpt_count=0 26work_end_exit_count=0 27work_item_id=-1 |
| 29system_port=system.membus.port[0] | 28system_port=system.membus.slave[0] |
| 30 31[system.cpu] 32type=DerivO3CPU 33children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 34BTBEntries=4096 35BTBTagSize=16 36LFSTSize=1024 37LQEntries=32 --- 85 unchanged lines hidden (view full) --- 123wbDepth=1 124wbWidth=8 125workload=system.cpu.workload 126dcache_port=system.cpu.dcache.cpu_side 127icache_port=system.cpu.icache.cpu_side 128 129[system.cpu.dcache] 130type=BaseCache | 29 30[system.cpu] 31type=DerivO3CPU 32children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 33BTBEntries=4096 34BTBTagSize=16 35LFSTSize=1024 36LQEntries=32 --- 85 unchanged lines hidden (view full) --- 122wbDepth=1 123wbWidth=8 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.dcache] 129type=BaseCache |
| 131addr_range=0:18446744073709551615 | 130addr_ranges=0:18446744073709551615 |
| 132assoc=2 133block_size=64 134forward_snoops=true 135hash_delay=1 136is_top_level=true 137latency=1000 138max_miss_count=0 139mshrs=10 --- 4 unchanged lines hidden (view full) --- 144size=262144 145subblock_size=0 146system=system 147tgts_per_mshr=20 148trace_addr=0 149two_queue=false 150write_buffers=8 151cpu_side=system.cpu.dcache_port | 131assoc=2 132block_size=64 133forward_snoops=true 134hash_delay=1 135is_top_level=true 136latency=1000 137max_miss_count=0 138mshrs=10 --- 4 unchanged lines hidden (view full) --- 143size=262144 144subblock_size=0 145system=system 146tgts_per_mshr=20 147trace_addr=0 148two_queue=false 149write_buffers=8 150cpu_side=system.cpu.dcache_port |
| 152mem_side=system.cpu.toL2Bus.port[1] | 151mem_side=system.cpu.toL2Bus.slave[1] |
| 153 154[system.cpu.dtb] 155type=PowerTLB 156size=64 157 158[system.cpu.fuPool] 159type=FUPool 160children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 415[system.cpu.fuPool.FUList8.opList] 416type=OpDesc 417issueLat=3 418opClass=IprAccess 419opLat=3 420 421[system.cpu.icache] 422type=BaseCache | 152 153[system.cpu.dtb] 154type=PowerTLB 155size=64 156 157[system.cpu.fuPool] 158type=FUPool 159children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 414[system.cpu.fuPool.FUList8.opList] 415type=OpDesc 416issueLat=3 417opClass=IprAccess 418opLat=3 419 420[system.cpu.icache] 421type=BaseCache |
| 423addr_range=0:18446744073709551615 | 422addr_ranges=0:18446744073709551615 |
| 424assoc=2 425block_size=64 426forward_snoops=true 427hash_delay=1 428is_top_level=true 429latency=1000 430max_miss_count=0 431mshrs=10 --- 4 unchanged lines hidden (view full) --- 436size=131072 437subblock_size=0 438system=system 439tgts_per_mshr=20 440trace_addr=0 441two_queue=false 442write_buffers=8 443cpu_side=system.cpu.icache_port | 423assoc=2 424block_size=64 425forward_snoops=true 426hash_delay=1 427is_top_level=true 428latency=1000 429max_miss_count=0 430mshrs=10 --- 4 unchanged lines hidden (view full) --- 435size=131072 436subblock_size=0 437system=system 438tgts_per_mshr=20 439trace_addr=0 440two_queue=false 441write_buffers=8 442cpu_side=system.cpu.icache_port |
| 444mem_side=system.cpu.toL2Bus.port[0] | 443mem_side=system.cpu.toL2Bus.slave[0] |
| 445 446[system.cpu.interrupts] 447type=PowerInterrupts 448 449[system.cpu.itb] 450type=PowerTLB 451size=64 452 453[system.cpu.l2cache] 454type=BaseCache | 444 445[system.cpu.interrupts] 446type=PowerInterrupts 447 448[system.cpu.itb] 449type=PowerTLB 450size=64 451 452[system.cpu.l2cache] 453type=BaseCache |
| 455addr_range=0:18446744073709551615 | 454addr_ranges=0:18446744073709551615 |
| 456assoc=2 457block_size=64 458forward_snoops=true 459hash_delay=1 460is_top_level=false 461latency=1000 462max_miss_count=0 463mshrs=10 464prefetch_on_access=false 465prefetcher=Null 466prioritizeRequests=false 467repl=Null 468size=2097152 469subblock_size=0 470system=system 471tgts_per_mshr=5 472trace_addr=0 473two_queue=false 474write_buffers=8 | 455assoc=2 456block_size=64 457forward_snoops=true 458hash_delay=1 459is_top_level=false 460latency=1000 461max_miss_count=0 462mshrs=10 463prefetch_on_access=false 464prefetcher=Null 465prioritizeRequests=false 466repl=Null 467size=2097152 468subblock_size=0 469system=system 470tgts_per_mshr=5 471trace_addr=0 472two_queue=false 473write_buffers=8 |
| 475cpu_side=system.cpu.toL2Bus.port[2] 476mem_side=system.membus.port[2] | 474cpu_side=system.cpu.toL2Bus.master[0] 475mem_side=system.membus.slave[1] |
| 477 478[system.cpu.toL2Bus] 479type=Bus 480block_size=64 481bus_id=0 482clock=1000 483header_cycles=1 484use_default_range=false 485width=64 | 476 477[system.cpu.toL2Bus] 478type=Bus 479block_size=64 480bus_id=0 481clock=1000 482header_cycles=1 483use_default_range=false 484width=64 |
| 486port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side | 485master=system.cpu.l2cache.cpu_side 486slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side |
| 487 488[system.cpu.tracer] 489type=ExeTracer 490 491[system.cpu.workload] 492type=LiveProcess 493cmd=hello 494cwd= --- 15 unchanged lines hidden (view full) --- 510[system.membus] 511type=Bus 512block_size=64 513bus_id=0 514clock=1000 515header_cycles=1 516use_default_range=false 517width=64 | 487 488[system.cpu.tracer] 489type=ExeTracer 490 491[system.cpu.workload] 492type=LiveProcess 493cmd=hello 494cwd= --- 15 unchanged lines hidden (view full) --- 510[system.membus] 511type=Bus 512block_size=64 513bus_id=0 514clock=1000 515header_cycles=1 516use_default_range=false 517width=64 |
| 518port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side | 518master=system.physmem.port[0] 519slave=system.system_port system.cpu.l2cache.mem_side |
| 519 520[system.physmem] | 520 521[system.physmem] |
| 521type=PhysicalMemory | 522type=SimpleMemory 523conf_table_reported=false |
| 522file= | 524file= |
| 525in_addr_map=true |
|
| 523latency=30000 524latency_var=0 525null=false 526range=0:134217727 527zero=false | 526latency=30000 527latency_var=0 528null=false 529range=0:134217727 530zero=false |
| 528port=system.membus.port[1] | 531port=system.membus.master[0] |
| 529 | 532 |