| config.ini (10451:3a87241adfb8) | config.ini (10736:4433fb00fa7d) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
| 26mmap_using_noreserve=false |
|
| 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 --- 43 unchanged lines hidden (view full) --- 77icache_port=system.cpu.icache.cpu_side 78 79[system.cpu.dcache] 80type=BaseCache 81children=tags 82addr_ranges=0:18446744073709551615 83assoc=2 84clk_domain=system.cpu_clk_domain | 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 43 unchanged lines hidden (view full) --- 78icache_port=system.cpu.icache.cpu_side 79 80[system.cpu.dcache] 81type=BaseCache 82children=tags 83addr_ranges=0:18446744073709551615 84assoc=2 85clk_domain=system.cpu_clk_domain |
| 86demand_mshr_reserve=1 |
|
| 85eventq_index=0 86forward_snoops=true 87hit_latency=2 88is_top_level=true 89max_miss_count=0 90mshrs=4 91prefetch_on_access=false 92prefetcher=Null --- 24 unchanged lines hidden (view full) --- 117size=64 118 119[system.cpu.icache] 120type=BaseCache 121children=tags 122addr_ranges=0:18446744073709551615 123assoc=2 124clk_domain=system.cpu_clk_domain | 87eventq_index=0 88forward_snoops=true 89hit_latency=2 90is_top_level=true 91max_miss_count=0 92mshrs=4 93prefetch_on_access=false 94prefetcher=Null --- 24 unchanged lines hidden (view full) --- 119size=64 120 121[system.cpu.icache] 122type=BaseCache 123children=tags 124addr_ranges=0:18446744073709551615 125assoc=2 126clk_domain=system.cpu_clk_domain |
| 127demand_mshr_reserve=1 |
|
| 125eventq_index=0 126forward_snoops=true 127hit_latency=2 128is_top_level=true 129max_miss_count=0 130mshrs=4 131prefetch_on_access=false 132prefetcher=Null --- 35 unchanged lines hidden (view full) --- 168size=64 169 170[system.cpu.l2cache] 171type=BaseCache 172children=tags 173addr_ranges=0:18446744073709551615 174assoc=8 175clk_domain=system.cpu_clk_domain | 128eventq_index=0 129forward_snoops=true 130hit_latency=2 131is_top_level=true 132max_miss_count=0 133mshrs=4 134prefetch_on_access=false 135prefetcher=Null --- 35 unchanged lines hidden (view full) --- 171size=64 172 173[system.cpu.l2cache] 174type=BaseCache 175children=tags 176addr_ranges=0:18446744073709551615 177assoc=8 178clk_domain=system.cpu_clk_domain |
| 179demand_mshr_reserve=1 |
|
| 176eventq_index=0 177forward_snoops=true 178hit_latency=20 179is_top_level=false 180max_miss_count=0 181mshrs=20 182prefetch_on_access=false 183prefetcher=Null --- 17 unchanged lines hidden (view full) --- 201hit_latency=20 202sequential_access=false 203size=2097152 204 205[system.cpu.toL2Bus] 206type=CoherentXBar 207clk_domain=system.cpu_clk_domain 208eventq_index=0 | 180eventq_index=0 181forward_snoops=true 182hit_latency=20 183is_top_level=false 184max_miss_count=0 185mshrs=20 186prefetch_on_access=false 187prefetcher=Null --- 17 unchanged lines hidden (view full) --- 205hit_latency=20 206sequential_access=false 207size=2097152 208 209[system.cpu.toL2Bus] 210type=CoherentXBar 211clk_domain=system.cpu_clk_domain 212eventq_index=0 |
| 209header_cycles=1 | 213forward_latency=0 214frontend_latency=1 215response_latency=1 |
| 210snoop_filter=Null | 216snoop_filter=Null |
| 217snoop_response_latency=1 |
|
| 211system=system 212use_default_range=false 213width=32 214master=system.cpu.l2cache.cpu_side 215slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 216 217[system.cpu.tracer] 218type=ExeTracer 219eventq_index=0 220 221[system.cpu.workload] 222type=LiveProcess 223cmd=hello 224cwd= | 218system=system 219use_default_range=false 220width=32 221master=system.cpu.l2cache.cpu_side 222slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 223 224[system.cpu.tracer] 225type=ExeTracer 226eventq_index=0 227 228[system.cpu.workload] 229type=LiveProcess 230cmd=hello 231cwd= |
| 232drivers= |
|
| 225egid=100 226env= 227errout=cerr 228euid=100 229eventq_index=0 230executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello 231gid=100 232input=cin | 233egid=100 234env= 235errout=cerr 236euid=100 237eventq_index=0 238executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello 239gid=100 240input=cin |
| 241kvmInSE=false |
|
| 233max_stack_size=67108864 234output=cout 235pid=100 236ppid=99 237simpoint=0 238system=system 239uid=100 240useArchPT=false --- 13 unchanged lines hidden (view full) --- 254eventq_index=0 255sys_clk_domain=system.clk_domain 256transition_latency=100000000 257 258[system.membus] 259type=CoherentXBar 260clk_domain=system.clk_domain 261eventq_index=0 | 242max_stack_size=67108864 243output=cout 244pid=100 245ppid=99 246simpoint=0 247system=system 248uid=100 249useArchPT=false --- 13 unchanged lines hidden (view full) --- 263eventq_index=0 264sys_clk_domain=system.clk_domain 265transition_latency=100000000 266 267[system.membus] 268type=CoherentXBar 269clk_domain=system.clk_domain 270eventq_index=0 |
| 262header_cycles=1 | 271forward_latency=4 272frontend_latency=3 273response_latency=2 |
| 263snoop_filter=Null | 274snoop_filter=Null |
| 275snoop_response_latency=4 |
|
| 264system=system 265use_default_range=false | 276system=system 277use_default_range=false |
| 266width=8 | 278width=16 |
| 267master=system.physmem.port 268slave=system.system_port system.cpu.l2cache.mem_side 269 270[system.physmem] 271type=SimpleMemory 272bandwidth=73.000000 273clk_domain=system.clk_domain 274conf_table_reported=true --- 13 unchanged lines hidden --- | 279master=system.physmem.port 280slave=system.system_port system.cpu.l2cache.mem_side 281 282[system.physmem] 283type=SimpleMemory 284bandwidth=73.000000 285clk_domain=system.clk_domain 286conf_table_reported=true --- 13 unchanged lines hidden --- |