| config.ini (11570:4aac82f10951) | config.ini (11960:c7bf1b698ccd) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 76 unchanged lines hidden (view full) --- 85power_model=Null 86profile=0 87progress_interval=0 88simpoint_start_insts= 89simulate_data_stalls=false 90simulate_inst_stalls=false 91socket_id=0 92switched_out=false | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 76 unchanged lines hidden (view full) --- 85power_model=Null 86profile=0 87progress_interval=0 88simpoint_start_insts= 89simulate_data_stalls=false 90simulate_inst_stalls=false 91socket_id=0 92switched_out=false |
| 93syscallRetryLatency=10000 |
|
| 93system=system 94tracer=system.cpu.tracer 95width=1 96workload=system.cpu.workload 97dcache_port=system.membus.slave[2] 98icache_port=system.membus.slave[1] 99 100[system.cpu.checker] --- 25 unchanged lines hidden (view full) --- 126p_state_clk_gate_max=1000000000000 127p_state_clk_gate_min=1000 128power_model=Null 129profile=0 130progress_interval=0 131simpoint_start_insts= 132socket_id=0 133switched_out=false | 94system=system 95tracer=system.cpu.tracer 96width=1 97workload=system.cpu.workload 98dcache_port=system.membus.slave[2] 99icache_port=system.membus.slave[1] 100 101[system.cpu.checker] --- 25 unchanged lines hidden (view full) --- 127p_state_clk_gate_max=1000000000000 128p_state_clk_gate_min=1000 129power_model=Null 130profile=0 131progress_interval=0 132simpoint_start_insts= 133socket_id=0 134switched_out=false |
| 135syscallRetryLatency=10000 |
|
| 134system=system 135tracer=system.cpu.checker.tracer 136updateOnError=false 137warnOnlyOnLoadError=true 138workload=system.cpu.workload 139 140[system.cpu.checker.dstage2_mmu] 141type=ArmStage2MMU --- 53 unchanged lines hidden (view full) --- 195id_aa64afr0_el1=0 196id_aa64afr1_el1=0 197id_aa64dfr0_el1=1052678 198id_aa64dfr1_el1=0 199id_aa64isar0_el1=0 200id_aa64isar1_el1=0 201id_aa64mmfr0_el1=15728642 202id_aa64mmfr1_el1=0 | 136system=system 137tracer=system.cpu.checker.tracer 138updateOnError=false 139warnOnlyOnLoadError=true 140workload=system.cpu.workload 141 142[system.cpu.checker.dstage2_mmu] 143type=ArmStage2MMU --- 53 unchanged lines hidden (view full) --- 197id_aa64afr0_el1=0 198id_aa64afr1_el1=0 199id_aa64dfr0_el1=1052678 200id_aa64dfr1_el1=0 201id_aa64isar0_el1=0 202id_aa64isar1_el1=0 203id_aa64mmfr0_el1=15728642 204id_aa64mmfr1_el1=0 |
| 203id_aa64pfr0_el1=17 204id_aa64pfr1_el1=0 | |
| 205id_isar0=34607377 206id_isar1=34677009 207id_isar2=555950401 208id_isar3=17899825 209id_isar4=268501314 210id_isar5=0 211id_mmfr0=270536963 212id_mmfr1=0 213id_mmfr2=19070976 214id_mmfr3=34611729 | 205id_isar0=34607377 206id_isar1=34677009 207id_isar2=555950401 208id_isar3=17899825 209id_isar4=268501314 210id_isar5=0 211id_mmfr0=270536963 212id_mmfr1=0 213id_mmfr2=19070976 214id_mmfr3=34611729 |
| 215id_pfr0=49 216id_pfr1=4113 | |
| 217midr=1091551472 218pmu=Null 219system=system 220 221[system.cpu.checker.istage2_mmu] 222type=ArmStage2MMU 223children=stage2_tlb 224eventq_index=0 --- 110 unchanged lines hidden (view full) --- 335id_aa64afr0_el1=0 336id_aa64afr1_el1=0 337id_aa64dfr0_el1=1052678 338id_aa64dfr1_el1=0 339id_aa64isar0_el1=0 340id_aa64isar1_el1=0 341id_aa64mmfr0_el1=15728642 342id_aa64mmfr1_el1=0 | 215midr=1091551472 216pmu=Null 217system=system 218 219[system.cpu.checker.istage2_mmu] 220type=ArmStage2MMU 221children=stage2_tlb 222eventq_index=0 --- 110 unchanged lines hidden (view full) --- 333id_aa64afr0_el1=0 334id_aa64afr1_el1=0 335id_aa64dfr0_el1=1052678 336id_aa64dfr1_el1=0 337id_aa64isar0_el1=0 338id_aa64isar1_el1=0 339id_aa64mmfr0_el1=15728642 340id_aa64mmfr1_el1=0 |
| 343id_aa64pfr0_el1=17 344id_aa64pfr1_el1=0 | |
| 345id_isar0=34607377 346id_isar1=34677009 347id_isar2=555950401 348id_isar3=17899825 349id_isar4=268501314 350id_isar5=0 351id_mmfr0=270536963 352id_mmfr1=0 353id_mmfr2=19070976 354id_mmfr3=34611729 | 341id_isar0=34607377 342id_isar1=34677009 343id_isar2=555950401 344id_isar3=17899825 345id_isar4=268501314 346id_isar5=0 347id_mmfr0=270536963 348id_mmfr1=0 349id_mmfr2=19070976 350id_mmfr3=34611729 |
| 355id_pfr0=49 356id_pfr1=4113 | |
| 357midr=1091551472 358pmu=Null 359system=system 360 361[system.cpu.istage2_mmu] 362type=ArmStage2MMU 363children=stage2_tlb 364eventq_index=0 --- 44 unchanged lines hidden (view full) --- 409sys=system 410port=system.membus.slave[3] 411 412[system.cpu.tracer] 413type=ExeTracer 414eventq_index=0 415 416[system.cpu.workload] | 351midr=1091551472 352pmu=Null 353system=system 354 355[system.cpu.istage2_mmu] 356type=ArmStage2MMU 357children=stage2_tlb 358eventq_index=0 --- 44 unchanged lines hidden (view full) --- 403sys=system 404port=system.membus.slave[3] 405 406[system.cpu.tracer] 407type=ExeTracer 408eventq_index=0 409 410[system.cpu.workload] |
| 417type=LiveProcess | 411type=Process |
| 418cmd=hello 419cwd= 420drivers= 421egid=100 422env= 423errout=cerr 424euid=100 425eventq_index=0 | 412cmd=hello 413cwd= 414drivers= 415egid=100 416env= 417errout=cerr 418euid=100 419eventq_index=0 |
| 426executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/arm/linux/hello | 420executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/arm/linux/hello |
| 427gid=100 428input=cin 429kvmInSE=false | 421gid=100 422input=cin 423kvmInSE=false |
| 430max_stack_size=67108864 | 424maxStackSize=67108864 |
| 431output=cout | 425output=cout |
| 426pgid=100 |
|
| 432pid=100 | 427pid=100 |
| 433ppid=99 | 428ppid=0 |
| 434simpoint=0 435system=system 436uid=100 437useArchPT=false 438 439[system.cpu_clk_domain] 440type=SrcClockDomain 441clock=500 --- 7 unchanged lines hidden (view full) --- 449domains= 450enable=false 451eventq_index=0 452sys_clk_domain=system.clk_domain 453transition_latency=100000000 454 455[system.membus] 456type=CoherentXBar | 429simpoint=0 430system=system 431uid=100 432useArchPT=false 433 434[system.cpu_clk_domain] 435type=SrcClockDomain 436clock=500 --- 7 unchanged lines hidden (view full) --- 444domains= 445enable=false 446eventq_index=0 447sys_clk_domain=system.clk_domain 448transition_latency=100000000 449 450[system.membus] 451type=CoherentXBar |
| 452children=snoop_filter |
|
| 457clk_domain=system.clk_domain 458default_p_state=UNDEFINED 459eventq_index=0 460forward_latency=4 461frontend_latency=3 462p_state_clk_gate_bins=20 463p_state_clk_gate_max=1000000000000 464p_state_clk_gate_min=1000 465point_of_coherency=true 466power_model=Null 467response_latency=2 | 453clk_domain=system.clk_domain 454default_p_state=UNDEFINED 455eventq_index=0 456forward_latency=4 457frontend_latency=3 458p_state_clk_gate_bins=20 459p_state_clk_gate_max=1000000000000 460p_state_clk_gate_min=1000 461point_of_coherency=true 462power_model=Null 463response_latency=2 |
| 468snoop_filter=Null | 464snoop_filter=system.membus.snoop_filter |
| 469snoop_response_latency=4 470system=system 471use_default_range=false 472width=16 473master=system.physmem.port 474slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port 475 | 465snoop_response_latency=4 466system=system 467use_default_range=false 468width=16 469master=system.physmem.port 470slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port 471 |
| 472[system.membus.snoop_filter] 473type=SnoopFilter 474eventq_index=0 475lookup_latency=1 476max_capacity=8388608 477system=system 478 |
|
| 476[system.physmem] 477type=SimpleMemory 478bandwidth=73.000000 479clk_domain=system.clk_domain 480conf_table_reported=true 481default_p_state=UNDEFINED 482eventq_index=0 483in_addr_map=true | 479[system.physmem] 480type=SimpleMemory 481bandwidth=73.000000 482clk_domain=system.clk_domain 483conf_table_reported=true 484default_p_state=UNDEFINED 485eventq_index=0 486in_addr_map=true |
| 487kvm_map=true |
|
| 484latency=30000 485latency_var=0 486null=false 487p_state_clk_gate_bins=20 488p_state_clk_gate_max=1000000000000 489p_state_clk_gate_min=1000 490power_model=Null | 488latency=30000 489latency_var=0 490null=false 491p_state_clk_gate_bins=20 492p_state_clk_gate_max=1000000000000 493p_state_clk_gate_min=1000 494power_model=Null |
| 491range=0:134217727 | 495range=0:134217727:0:0:0:0 |
| 492port=system.membus.master[0] 493 494[system.voltage_domain] 495type=VoltageDomain 496eventq_index=0 497voltage=1.000000 498 | 496port=system.membus.master[0] 497 498[system.voltage_domain] 499type=VoltageDomain 500eventq_index=0 501voltage=1.000000 502 |