Cross Reference: /gem5/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini

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config.ini (11219:b65d4e878ed2)	config.ini (11268:8b4b55d79ddd)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false 27multi_thread=false 28num_work_ids=16 29readfile= 30symbolfile= 31work_begin_ckpt_count=0 32work_begin_cpu_id_exit=-1 33work_begin_exit_count=0 34work_cpus_ckpt_count=0 35work_end_ckpt_count=0 36work_end_exit_count=0 37work_item_id=-1 38system_port=system.membus.slave[0] 39 40[system.clk_domain] 41type=SrcClockDomain 42clock=1000 43domain_id=-1 44eventq_index=0 45init_perf_level=0 46voltage_domain=system.voltage_domain 47 48[system.cpu] 49type=MinorCPU 50children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 51branchPred=system.cpu.branchPred 52checker=Null 53clk_domain=system.cpu_clk_domain 54cpu_id=0 55decodeCycleInput=true 56decodeInputBufferSize=3 57decodeInputWidth=2 58decodeToExecuteForwardDelay=1 59do_checkpoint_insts=true 60do_quiesce=true 61do_statistics_insts=true 62dstage2_mmu=system.cpu.dstage2_mmu 63dtb=system.cpu.dtb 64enableIdling=true 65eventq_index=0 66executeAllowEarlyMemoryIssue=true 67executeBranchDelay=1 68executeCommitLimit=2 69executeCycleInput=true 70executeFuncUnits=system.cpu.executeFuncUnits 71executeInputBufferSize=7 72executeInputWidth=2 73executeIssueLimit=2 74executeLSQMaxStoreBufferStoresPerCycle=2 75executeLSQRequestsQueueSize=1 76executeLSQStoreBufferSize=5 77executeLSQTransfersQueueSize=2 78executeMaxAccessesInMemory=2 79executeMemoryCommitLimit=1 80executeMemoryIssueLimit=1 81executeMemoryWidth=0 82executeSetTraceTimeOnCommit=true 83executeSetTraceTimeOnIssue=false 84fetch1FetchLimit=1 85fetch1LineSnapWidth=0 86fetch1LineWidth=0 87fetch1ToFetch2BackwardDelay=1 88fetch1ToFetch2ForwardDelay=1 89fetch2CycleInput=true 90fetch2InputBufferSize=2 91fetch2ToDecodeForwardDelay=1 92function_trace=false 93function_trace_start=0 94interrupts=system.cpu.interrupts 95isa=system.cpu.isa 96istage2_mmu=system.cpu.istage2_mmu 97itb=system.cpu.itb 98max_insts_all_threads=0 99max_insts_any_thread=0 100max_loads_all_threads=0 101max_loads_any_thread=0 102numThreads=1 103profile=0 104progress_interval=0 105simpoint_start_insts= 106socket_id=0 107switched_out=false 108system=system 109tracer=system.cpu.tracer 110workload=system.cpu.workload 111dcache_port=system.cpu.dcache.cpu_side 112icache_port=system.cpu.icache.cpu_side 113 114[system.cpu.branchPred] 115type=TournamentBP 116BTBEntries=4096 117BTBTagSize=16 118RASSize=16 119choiceCtrBits=2 120choicePredictorSize=8192 121eventq_index=0 122globalCtrBits=2 123globalPredictorSize=8192 124instShiftAmt=2 125localCtrBits=2 126localHistoryTableSize=2048 127localPredictorSize=2048 128numThreads=1 129 130[system.cpu.dcache] 131type=Cache 132children=tags 133addr_ranges=0:18446744073709551615 134assoc=2 135clk_domain=system.cpu_clk_domain 136clusivity=mostly_incl 137demand_mshr_reserve=1 138eventq_index=0 139forward_snoops=true 140hit_latency=2 141is_read_only=false 142max_miss_count=0 143mshrs=4 144prefetch_on_access=false 145prefetcher=Null 146response_latency=2 147sequential_access=false 148size=262144 149system=system 150tags=system.cpu.dcache.tags 151tgts_per_mshr=20 152write_buffers=8 153writeback_clean=false 154cpu_side=system.cpu.dcache_port 155mem_side=system.cpu.toL2Bus.slave[1] 156 157[system.cpu.dcache.tags] 158type=LRU 159assoc=2 160block_size=64 161clk_domain=system.cpu_clk_domain 162eventq_index=0 163hit_latency=2 164sequential_access=false 165size=262144 166 167[system.cpu.dstage2_mmu] 168type=ArmStage2MMU 169children=stage2_tlb 170eventq_index=0 171stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 172sys=system 173tlb=system.cpu.dtb 174 175[system.cpu.dstage2_mmu.stage2_tlb] 176type=ArmTLB 177children=walker 178eventq_index=0 179is_stage2=true 180size=32 181walker=system.cpu.dstage2_mmu.stage2_tlb.walker 182 183[system.cpu.dstage2_mmu.stage2_tlb.walker] 184type=ArmTableWalker 185clk_domain=system.cpu_clk_domain 186eventq_index=0 187is_stage2=true 188num_squash_per_cycle=2 189sys=system 190 191[system.cpu.dtb] 192type=ArmTLB 193children=walker 194eventq_index=0 195is_stage2=false 196size=64 197walker=system.cpu.dtb.walker 198 199[system.cpu.dtb.walker] 200type=ArmTableWalker 201clk_domain=system.cpu_clk_domain 202eventq_index=0 203is_stage2=false 204num_squash_per_cycle=2 205sys=system 206port=system.cpu.toL2Bus.slave[3] 207 208[system.cpu.executeFuncUnits] 209type=MinorFUPool 210children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 211eventq_index=0 212funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 213 214[system.cpu.executeFuncUnits.funcUnits0] 215type=MinorFU 216children=opClasses timings 217cantForwardFromFUIndices= 218eventq_index=0 219issueLat=1 220opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 221opLat=3 222timings=system.cpu.executeFuncUnits.funcUnits0.timings 223 224[system.cpu.executeFuncUnits.funcUnits0.opClasses] 225type=MinorOpClassSet 226children=opClasses 227eventq_index=0 228opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 229 230[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 231type=MinorOpClass 232eventq_index=0 233opClass=IntAlu 234 235[system.cpu.executeFuncUnits.funcUnits0.timings] 236type=MinorFUTiming 237children=opClasses 238description=Int 239eventq_index=0 240extraAssumedLat=0 241extraCommitLat=0 242extraCommitLatExpr=Null 243mask=0 244match=0 245opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 246srcRegsRelativeLats=2 247suppress=false 248 249[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 250type=MinorOpClassSet 251eventq_index=0 252opClasses= 253 254[system.cpu.executeFuncUnits.funcUnits1] 255type=MinorFU 256children=opClasses timings 257cantForwardFromFUIndices= 258eventq_index=0 259issueLat=1 260opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 261opLat=3 262timings=system.cpu.executeFuncUnits.funcUnits1.timings 263 264[system.cpu.executeFuncUnits.funcUnits1.opClasses] 265type=MinorOpClassSet 266children=opClasses 267eventq_index=0 268opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 269 270[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 271type=MinorOpClass 272eventq_index=0 273opClass=IntAlu 274 275[system.cpu.executeFuncUnits.funcUnits1.timings] 276type=MinorFUTiming 277children=opClasses 278description=Int 279eventq_index=0 280extraAssumedLat=0 281extraCommitLat=0 282extraCommitLatExpr=Null 283mask=0 284match=0 285opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 286srcRegsRelativeLats=2 287suppress=false 288 289[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 290type=MinorOpClassSet 291eventq_index=0 292opClasses= 293 294[system.cpu.executeFuncUnits.funcUnits2] 295type=MinorFU 296children=opClasses timings 297cantForwardFromFUIndices= 298eventq_index=0 299issueLat=1 300opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 301opLat=3 302timings=system.cpu.executeFuncUnits.funcUnits2.timings 303 304[system.cpu.executeFuncUnits.funcUnits2.opClasses] 305type=MinorOpClassSet 306children=opClasses 307eventq_index=0 308opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 309 310[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 311type=MinorOpClass 312eventq_index=0 313opClass=IntMult 314 315[system.cpu.executeFuncUnits.funcUnits2.timings] 316type=MinorFUTiming 317children=opClasses 318description=Mul 319eventq_index=0 320extraAssumedLat=0 321extraCommitLat=0 322extraCommitLatExpr=Null 323mask=0 324match=0 325opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 326srcRegsRelativeLats=0 327suppress=false 328 329[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 330type=MinorOpClassSet 331eventq_index=0 332opClasses= 333 334[system.cpu.executeFuncUnits.funcUnits3] 335type=MinorFU 336children=opClasses 337cantForwardFromFUIndices= 338eventq_index=0 339issueLat=9 340opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 341opLat=9 342timings= 343 344[system.cpu.executeFuncUnits.funcUnits3.opClasses] 345type=MinorOpClassSet 346children=opClasses 347eventq_index=0 348opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 349 350[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 351type=MinorOpClass 352eventq_index=0 353opClass=IntDiv 354 355[system.cpu.executeFuncUnits.funcUnits4] 356type=MinorFU 357children=opClasses timings 358cantForwardFromFUIndices= 359eventq_index=0 360issueLat=1 361opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 362opLat=6 363timings=system.cpu.executeFuncUnits.funcUnits4.timings 364 365[system.cpu.executeFuncUnits.funcUnits4.opClasses] 366type=MinorOpClassSet 367children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 368eventq_index=0 369opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 370 371[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 372type=MinorOpClass 373eventq_index=0 374opClass=FloatAdd 375 376[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 377type=MinorOpClass 378eventq_index=0 379opClass=FloatCmp 380 381[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 382type=MinorOpClass 383eventq_index=0 384opClass=FloatCvt 385 386[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 387type=MinorOpClass 388eventq_index=0 389opClass=FloatMult 390 391[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 392type=MinorOpClass 393eventq_index=0 394opClass=FloatDiv 395 396[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 397type=MinorOpClass 398eventq_index=0 399opClass=FloatSqrt 400 401[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 402type=MinorOpClass 403eventq_index=0 404opClass=SimdAdd 405 406[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 407type=MinorOpClass 408eventq_index=0 409opClass=SimdAddAcc 410 411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 412type=MinorOpClass 413eventq_index=0 414opClass=SimdAlu 415 416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 417type=MinorOpClass 418eventq_index=0 419opClass=SimdCmp 420 421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 422type=MinorOpClass 423eventq_index=0 424opClass=SimdCvt 425 426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 427type=MinorOpClass 428eventq_index=0 429opClass=SimdMisc 430 431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 432type=MinorOpClass 433eventq_index=0 434opClass=SimdMult 435 436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 437type=MinorOpClass 438eventq_index=0 439opClass=SimdMultAcc 440 441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 442type=MinorOpClass 443eventq_index=0 444opClass=SimdShift 445 446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 447type=MinorOpClass 448eventq_index=0 449opClass=SimdShiftAcc 450 451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 452type=MinorOpClass 453eventq_index=0 454opClass=SimdSqrt 455 456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 457type=MinorOpClass 458eventq_index=0 459opClass=SimdFloatAdd 460 461[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 462type=MinorOpClass 463eventq_index=0 464opClass=SimdFloatAlu 465 466[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 467type=MinorOpClass 468eventq_index=0 469opClass=SimdFloatCmp 470 471[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 472type=MinorOpClass 473eventq_index=0 474opClass=SimdFloatCvt 475 476[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 477type=MinorOpClass 478eventq_index=0 479opClass=SimdFloatDiv 480 481[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 482type=MinorOpClass 483eventq_index=0 484opClass=SimdFloatMisc 485 486[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 487type=MinorOpClass 488eventq_index=0 489opClass=SimdFloatMult 490 491[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 492type=MinorOpClass 493eventq_index=0 494opClass=SimdFloatMultAcc 495 496[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 497type=MinorOpClass 498eventq_index=0 499opClass=SimdFloatSqrt 500 501[system.cpu.executeFuncUnits.funcUnits4.timings] 502type=MinorFUTiming 503children=opClasses 504description=FloatSimd 505eventq_index=0 506extraAssumedLat=0 507extraCommitLat=0 508extraCommitLatExpr=Null 509mask=0 510match=0 511opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 512srcRegsRelativeLats=2 513suppress=false 514 515[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 516type=MinorOpClassSet 517eventq_index=0 518opClasses= 519 520[system.cpu.executeFuncUnits.funcUnits5] 521type=MinorFU 522children=opClasses timings 523cantForwardFromFUIndices= 524eventq_index=0 525issueLat=1 526opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 527opLat=1 528timings=system.cpu.executeFuncUnits.funcUnits5.timings 529 530[system.cpu.executeFuncUnits.funcUnits5.opClasses] 531type=MinorOpClassSet 532children=opClasses0 opClasses1 533eventq_index=0 534opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 535 536[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 537type=MinorOpClass 538eventq_index=0 539opClass=MemRead 540 541[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 542type=MinorOpClass 543eventq_index=0 544opClass=MemWrite 545 546[system.cpu.executeFuncUnits.funcUnits5.timings] 547type=MinorFUTiming 548children=opClasses 549description=Mem 550eventq_index=0 551extraAssumedLat=2 552extraCommitLat=0 553extraCommitLatExpr=Null 554mask=0 555match=0 556opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 557srcRegsRelativeLats=1 558suppress=false 559 560[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 561type=MinorOpClassSet 562eventq_index=0 563opClasses= 564 565[system.cpu.executeFuncUnits.funcUnits6] 566type=MinorFU 567children=opClasses 568cantForwardFromFUIndices= 569eventq_index=0 570issueLat=1 571opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 572opLat=1 573timings= 574 575[system.cpu.executeFuncUnits.funcUnits6.opClasses] 576type=MinorOpClassSet 577children=opClasses0 opClasses1 578eventq_index=0 579opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 580 581[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 582type=MinorOpClass 583eventq_index=0 584opClass=IprAccess 585 586[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 587type=MinorOpClass 588eventq_index=0 589opClass=InstPrefetch 590 591[system.cpu.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl 598demand_mshr_reserve=1 599eventq_index=0 600forward_snoops=true 601hit_latency=2 602is_read_only=true 603max_miss_count=0 604mshrs=4 605prefetch_on_access=false 606prefetcher=Null 607response_latency=2 608sequential_access=false 609size=131072 610system=system 611tags=system.cpu.icache.tags 612tgts_per_mshr=20 613write_buffers=8 614writeback_clean=true 615cpu_side=system.cpu.icache_port 616mem_side=system.cpu.toL2Bus.slave[0] 617 618[system.cpu.icache.tags] 619type=LRU 620assoc=2 621block_size=64 622clk_domain=system.cpu_clk_domain 623eventq_index=0 624hit_latency=2 625sequential_access=false 626size=131072 627 628[system.cpu.interrupts] 629type=ArmInterrupts 630eventq_index=0 631 632[system.cpu.isa] 633type=ArmISA 634decoderFlavour=Generic 635eventq_index=0 636fpsid=1090793632 637id_aa64afr0_el1=0 638id_aa64afr1_el1=0 639id_aa64dfr0_el1=1052678 640id_aa64dfr1_el1=0 641id_aa64isar0_el1=0 642id_aa64isar1_el1=0 643id_aa64mmfr0_el1=15728642 644id_aa64mmfr1_el1=0 645id_aa64pfr0_el1=17 646id_aa64pfr1_el1=0 647id_isar0=34607377 648id_isar1=34677009 649id_isar2=555950401 650id_isar3=17899825 651id_isar4=268501314 652id_isar5=0 653id_mmfr0=270536963 654id_mmfr1=0 655id_mmfr2=19070976 656id_mmfr3=34611729 657id_pfr0=49 658id_pfr1=4113 659midr=1091551472 660pmu=Null 661system=system 662 663[system.cpu.istage2_mmu] 664type=ArmStage2MMU 665children=stage2_tlb 666eventq_index=0 667stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 668sys=system 669tlb=system.cpu.itb 670 671[system.cpu.istage2_mmu.stage2_tlb] 672type=ArmTLB 673children=walker 674eventq_index=0 675is_stage2=true 676size=32 677walker=system.cpu.istage2_mmu.stage2_tlb.walker 678 679[system.cpu.istage2_mmu.stage2_tlb.walker] 680type=ArmTableWalker 681clk_domain=system.cpu_clk_domain 682eventq_index=0 683is_stage2=true 684num_squash_per_cycle=2 685sys=system 686 687[system.cpu.itb] 688type=ArmTLB 689children=walker 690eventq_index=0 691is_stage2=false 692size=64 693walker=system.cpu.itb.walker 694 695[system.cpu.itb.walker] 696type=ArmTableWalker 697clk_domain=system.cpu_clk_domain 698eventq_index=0 699is_stage2=false 700num_squash_per_cycle=2 701sys=system 702port=system.cpu.toL2Bus.slave[2] 703 704[system.cpu.l2cache] 705type=Cache 706children=tags 707addr_ranges=0:18446744073709551615 708assoc=8 709clk_domain=system.cpu_clk_domain 710clusivity=mostly_incl 711demand_mshr_reserve=1 712eventq_index=0 713forward_snoops=true 714hit_latency=20 715is_read_only=false 716max_miss_count=0 717mshrs=20 718prefetch_on_access=false 719prefetcher=Null 720response_latency=20 721sequential_access=false 722size=2097152 723system=system 724tags=system.cpu.l2cache.tags 725tgts_per_mshr=12 726write_buffers=8 727writeback_clean=false 728cpu_side=system.cpu.toL2Bus.master[0] 729mem_side=system.membus.slave[1] 730 731[system.cpu.l2cache.tags] 732type=LRU 733assoc=8 734block_size=64 735clk_domain=system.cpu_clk_domain 736eventq_index=0 737hit_latency=20 738sequential_access=false 739size=2097152 740 741[system.cpu.toL2Bus] 742type=CoherentXBar 743children=snoop_filter 744clk_domain=system.cpu_clk_domain 745eventq_index=0 746forward_latency=0 747frontend_latency=1 748response_latency=1 749snoop_filter=system.cpu.toL2Bus.snoop_filter 750snoop_response_latency=1 751system=system 752use_default_range=false 753width=32 754master=system.cpu.l2cache.cpu_side 755slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 756 757[system.cpu.toL2Bus.snoop_filter] 758type=SnoopFilter 759eventq_index=0 760lookup_latency=0 761max_capacity=8388608 762system=system 763 764[system.cpu.tracer] 765type=ExeTracer 766eventq_index=0 767 768[system.cpu.workload] 769type=LiveProcess 770cmd=hello 771cwd= 772drivers= 773egid=100 774env= 775errout=cerr 776euid=100 777eventq_index=0	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false 27multi_thread=false 28num_work_ids=16 29readfile= 30symbolfile= 31work_begin_ckpt_count=0 32work_begin_cpu_id_exit=-1 33work_begin_exit_count=0 34work_cpus_ckpt_count=0 35work_end_ckpt_count=0 36work_end_exit_count=0 37work_item_id=-1 38system_port=system.membus.slave[0] 39 40[system.clk_domain] 41type=SrcClockDomain 42clock=1000 43domain_id=-1 44eventq_index=0 45init_perf_level=0 46voltage_domain=system.voltage_domain 47 48[system.cpu] 49type=MinorCPU 50children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 51branchPred=system.cpu.branchPred 52checker=Null 53clk_domain=system.cpu_clk_domain 54cpu_id=0 55decodeCycleInput=true 56decodeInputBufferSize=3 57decodeInputWidth=2 58decodeToExecuteForwardDelay=1 59do_checkpoint_insts=true 60do_quiesce=true 61do_statistics_insts=true 62dstage2_mmu=system.cpu.dstage2_mmu 63dtb=system.cpu.dtb 64enableIdling=true 65eventq_index=0 66executeAllowEarlyMemoryIssue=true 67executeBranchDelay=1 68executeCommitLimit=2 69executeCycleInput=true 70executeFuncUnits=system.cpu.executeFuncUnits 71executeInputBufferSize=7 72executeInputWidth=2 73executeIssueLimit=2 74executeLSQMaxStoreBufferStoresPerCycle=2 75executeLSQRequestsQueueSize=1 76executeLSQStoreBufferSize=5 77executeLSQTransfersQueueSize=2 78executeMaxAccessesInMemory=2 79executeMemoryCommitLimit=1 80executeMemoryIssueLimit=1 81executeMemoryWidth=0 82executeSetTraceTimeOnCommit=true 83executeSetTraceTimeOnIssue=false 84fetch1FetchLimit=1 85fetch1LineSnapWidth=0 86fetch1LineWidth=0 87fetch1ToFetch2BackwardDelay=1 88fetch1ToFetch2ForwardDelay=1 89fetch2CycleInput=true 90fetch2InputBufferSize=2 91fetch2ToDecodeForwardDelay=1 92function_trace=false 93function_trace_start=0 94interrupts=system.cpu.interrupts 95isa=system.cpu.isa 96istage2_mmu=system.cpu.istage2_mmu 97itb=system.cpu.itb 98max_insts_all_threads=0 99max_insts_any_thread=0 100max_loads_all_threads=0 101max_loads_any_thread=0 102numThreads=1 103profile=0 104progress_interval=0 105simpoint_start_insts= 106socket_id=0 107switched_out=false 108system=system 109tracer=system.cpu.tracer 110workload=system.cpu.workload 111dcache_port=system.cpu.dcache.cpu_side 112icache_port=system.cpu.icache.cpu_side 113 114[system.cpu.branchPred] 115type=TournamentBP 116BTBEntries=4096 117BTBTagSize=16 118RASSize=16 119choiceCtrBits=2 120choicePredictorSize=8192 121eventq_index=0 122globalCtrBits=2 123globalPredictorSize=8192 124instShiftAmt=2 125localCtrBits=2 126localHistoryTableSize=2048 127localPredictorSize=2048 128numThreads=1 129 130[system.cpu.dcache] 131type=Cache 132children=tags 133addr_ranges=0:18446744073709551615 134assoc=2 135clk_domain=system.cpu_clk_domain 136clusivity=mostly_incl 137demand_mshr_reserve=1 138eventq_index=0 139forward_snoops=true 140hit_latency=2 141is_read_only=false 142max_miss_count=0 143mshrs=4 144prefetch_on_access=false 145prefetcher=Null 146response_latency=2 147sequential_access=false 148size=262144 149system=system 150tags=system.cpu.dcache.tags 151tgts_per_mshr=20 152write_buffers=8 153writeback_clean=false 154cpu_side=system.cpu.dcache_port 155mem_side=system.cpu.toL2Bus.slave[1] 156 157[system.cpu.dcache.tags] 158type=LRU 159assoc=2 160block_size=64 161clk_domain=system.cpu_clk_domain 162eventq_index=0 163hit_latency=2 164sequential_access=false 165size=262144 166 167[system.cpu.dstage2_mmu] 168type=ArmStage2MMU 169children=stage2_tlb 170eventq_index=0 171stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 172sys=system 173tlb=system.cpu.dtb 174 175[system.cpu.dstage2_mmu.stage2_tlb] 176type=ArmTLB 177children=walker 178eventq_index=0 179is_stage2=true 180size=32 181walker=system.cpu.dstage2_mmu.stage2_tlb.walker 182 183[system.cpu.dstage2_mmu.stage2_tlb.walker] 184type=ArmTableWalker 185clk_domain=system.cpu_clk_domain 186eventq_index=0 187is_stage2=true 188num_squash_per_cycle=2 189sys=system 190 191[system.cpu.dtb] 192type=ArmTLB 193children=walker 194eventq_index=0 195is_stage2=false 196size=64 197walker=system.cpu.dtb.walker 198 199[system.cpu.dtb.walker] 200type=ArmTableWalker 201clk_domain=system.cpu_clk_domain 202eventq_index=0 203is_stage2=false 204num_squash_per_cycle=2 205sys=system 206port=system.cpu.toL2Bus.slave[3] 207 208[system.cpu.executeFuncUnits] 209type=MinorFUPool 210children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 211eventq_index=0 212funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 213 214[system.cpu.executeFuncUnits.funcUnits0] 215type=MinorFU 216children=opClasses timings 217cantForwardFromFUIndices= 218eventq_index=0 219issueLat=1 220opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 221opLat=3 222timings=system.cpu.executeFuncUnits.funcUnits0.timings 223 224[system.cpu.executeFuncUnits.funcUnits0.opClasses] 225type=MinorOpClassSet 226children=opClasses 227eventq_index=0 228opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 229 230[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 231type=MinorOpClass 232eventq_index=0 233opClass=IntAlu 234 235[system.cpu.executeFuncUnits.funcUnits0.timings] 236type=MinorFUTiming 237children=opClasses 238description=Int 239eventq_index=0 240extraAssumedLat=0 241extraCommitLat=0 242extraCommitLatExpr=Null 243mask=0 244match=0 245opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 246srcRegsRelativeLats=2 247suppress=false 248 249[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 250type=MinorOpClassSet 251eventq_index=0 252opClasses= 253 254[system.cpu.executeFuncUnits.funcUnits1] 255type=MinorFU 256children=opClasses timings 257cantForwardFromFUIndices= 258eventq_index=0 259issueLat=1 260opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 261opLat=3 262timings=system.cpu.executeFuncUnits.funcUnits1.timings 263 264[system.cpu.executeFuncUnits.funcUnits1.opClasses] 265type=MinorOpClassSet 266children=opClasses 267eventq_index=0 268opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 269 270[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 271type=MinorOpClass 272eventq_index=0 273opClass=IntAlu 274 275[system.cpu.executeFuncUnits.funcUnits1.timings] 276type=MinorFUTiming 277children=opClasses 278description=Int 279eventq_index=0 280extraAssumedLat=0 281extraCommitLat=0 282extraCommitLatExpr=Null 283mask=0 284match=0 285opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 286srcRegsRelativeLats=2 287suppress=false 288 289[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 290type=MinorOpClassSet 291eventq_index=0 292opClasses= 293 294[system.cpu.executeFuncUnits.funcUnits2] 295type=MinorFU 296children=opClasses timings 297cantForwardFromFUIndices= 298eventq_index=0 299issueLat=1 300opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 301opLat=3 302timings=system.cpu.executeFuncUnits.funcUnits2.timings 303 304[system.cpu.executeFuncUnits.funcUnits2.opClasses] 305type=MinorOpClassSet 306children=opClasses 307eventq_index=0 308opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 309 310[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 311type=MinorOpClass 312eventq_index=0 313opClass=IntMult 314 315[system.cpu.executeFuncUnits.funcUnits2.timings] 316type=MinorFUTiming 317children=opClasses 318description=Mul 319eventq_index=0 320extraAssumedLat=0 321extraCommitLat=0 322extraCommitLatExpr=Null 323mask=0 324match=0 325opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 326srcRegsRelativeLats=0 327suppress=false 328 329[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 330type=MinorOpClassSet 331eventq_index=0 332opClasses= 333 334[system.cpu.executeFuncUnits.funcUnits3] 335type=MinorFU 336children=opClasses 337cantForwardFromFUIndices= 338eventq_index=0 339issueLat=9 340opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 341opLat=9 342timings= 343 344[system.cpu.executeFuncUnits.funcUnits3.opClasses] 345type=MinorOpClassSet 346children=opClasses 347eventq_index=0 348opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 349 350[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 351type=MinorOpClass 352eventq_index=0 353opClass=IntDiv 354 355[system.cpu.executeFuncUnits.funcUnits4] 356type=MinorFU 357children=opClasses timings 358cantForwardFromFUIndices= 359eventq_index=0 360issueLat=1 361opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 362opLat=6 363timings=system.cpu.executeFuncUnits.funcUnits4.timings 364 365[system.cpu.executeFuncUnits.funcUnits4.opClasses] 366type=MinorOpClassSet 367children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 368eventq_index=0 369opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 370 371[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 372type=MinorOpClass 373eventq_index=0 374opClass=FloatAdd 375 376[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 377type=MinorOpClass 378eventq_index=0 379opClass=FloatCmp 380 381[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 382type=MinorOpClass 383eventq_index=0 384opClass=FloatCvt 385 386[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 387type=MinorOpClass 388eventq_index=0 389opClass=FloatMult 390 391[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 392type=MinorOpClass 393eventq_index=0 394opClass=FloatDiv 395 396[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 397type=MinorOpClass 398eventq_index=0 399opClass=FloatSqrt 400 401[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 402type=MinorOpClass 403eventq_index=0 404opClass=SimdAdd 405 406[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 407type=MinorOpClass 408eventq_index=0 409opClass=SimdAddAcc 410 411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 412type=MinorOpClass 413eventq_index=0 414opClass=SimdAlu 415 416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 417type=MinorOpClass 418eventq_index=0 419opClass=SimdCmp 420 421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 422type=MinorOpClass 423eventq_index=0 424opClass=SimdCvt 425 426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 427type=MinorOpClass 428eventq_index=0 429opClass=SimdMisc 430 431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 432type=MinorOpClass 433eventq_index=0 434opClass=SimdMult 435 436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 437type=MinorOpClass 438eventq_index=0 439opClass=SimdMultAcc 440 441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 442type=MinorOpClass 443eventq_index=0 444opClass=SimdShift 445 446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 447type=MinorOpClass 448eventq_index=0 449opClass=SimdShiftAcc 450 451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 452type=MinorOpClass 453eventq_index=0 454opClass=SimdSqrt 455 456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 457type=MinorOpClass 458eventq_index=0 459opClass=SimdFloatAdd 460 461[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 462type=MinorOpClass 463eventq_index=0 464opClass=SimdFloatAlu 465 466[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 467type=MinorOpClass 468eventq_index=0 469opClass=SimdFloatCmp 470 471[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 472type=MinorOpClass 473eventq_index=0 474opClass=SimdFloatCvt 475 476[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 477type=MinorOpClass 478eventq_index=0 479opClass=SimdFloatDiv 480 481[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 482type=MinorOpClass 483eventq_index=0 484opClass=SimdFloatMisc 485 486[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 487type=MinorOpClass 488eventq_index=0 489opClass=SimdFloatMult 490 491[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 492type=MinorOpClass 493eventq_index=0 494opClass=SimdFloatMultAcc 495 496[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 497type=MinorOpClass 498eventq_index=0 499opClass=SimdFloatSqrt 500 501[system.cpu.executeFuncUnits.funcUnits4.timings] 502type=MinorFUTiming 503children=opClasses 504description=FloatSimd 505eventq_index=0 506extraAssumedLat=0 507extraCommitLat=0 508extraCommitLatExpr=Null 509mask=0 510match=0 511opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 512srcRegsRelativeLats=2 513suppress=false 514 515[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 516type=MinorOpClassSet 517eventq_index=0 518opClasses= 519 520[system.cpu.executeFuncUnits.funcUnits5] 521type=MinorFU 522children=opClasses timings 523cantForwardFromFUIndices= 524eventq_index=0 525issueLat=1 526opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 527opLat=1 528timings=system.cpu.executeFuncUnits.funcUnits5.timings 529 530[system.cpu.executeFuncUnits.funcUnits5.opClasses] 531type=MinorOpClassSet 532children=opClasses0 opClasses1 533eventq_index=0 534opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 535 536[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 537type=MinorOpClass 538eventq_index=0 539opClass=MemRead 540 541[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 542type=MinorOpClass 543eventq_index=0 544opClass=MemWrite 545 546[system.cpu.executeFuncUnits.funcUnits5.timings] 547type=MinorFUTiming 548children=opClasses 549description=Mem 550eventq_index=0 551extraAssumedLat=2 552extraCommitLat=0 553extraCommitLatExpr=Null 554mask=0 555match=0 556opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 557srcRegsRelativeLats=1 558suppress=false 559 560[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 561type=MinorOpClassSet 562eventq_index=0 563opClasses= 564 565[system.cpu.executeFuncUnits.funcUnits6] 566type=MinorFU 567children=opClasses 568cantForwardFromFUIndices= 569eventq_index=0 570issueLat=1 571opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 572opLat=1 573timings= 574 575[system.cpu.executeFuncUnits.funcUnits6.opClasses] 576type=MinorOpClassSet 577children=opClasses0 opClasses1 578eventq_index=0 579opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 580 581[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 582type=MinorOpClass 583eventq_index=0 584opClass=IprAccess 585 586[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 587type=MinorOpClass 588eventq_index=0 589opClass=InstPrefetch 590 591[system.cpu.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl 598demand_mshr_reserve=1 599eventq_index=0 600forward_snoops=true 601hit_latency=2 602is_read_only=true 603max_miss_count=0 604mshrs=4 605prefetch_on_access=false 606prefetcher=Null 607response_latency=2 608sequential_access=false 609size=131072 610system=system 611tags=system.cpu.icache.tags 612tgts_per_mshr=20 613write_buffers=8 614writeback_clean=true 615cpu_side=system.cpu.icache_port 616mem_side=system.cpu.toL2Bus.slave[0] 617 618[system.cpu.icache.tags] 619type=LRU 620assoc=2 621block_size=64 622clk_domain=system.cpu_clk_domain 623eventq_index=0 624hit_latency=2 625sequential_access=false 626size=131072 627 628[system.cpu.interrupts] 629type=ArmInterrupts 630eventq_index=0 631 632[system.cpu.isa] 633type=ArmISA 634decoderFlavour=Generic 635eventq_index=0 636fpsid=1090793632 637id_aa64afr0_el1=0 638id_aa64afr1_el1=0 639id_aa64dfr0_el1=1052678 640id_aa64dfr1_el1=0 641id_aa64isar0_el1=0 642id_aa64isar1_el1=0 643id_aa64mmfr0_el1=15728642 644id_aa64mmfr1_el1=0 645id_aa64pfr0_el1=17 646id_aa64pfr1_el1=0 647id_isar0=34607377 648id_isar1=34677009 649id_isar2=555950401 650id_isar3=17899825 651id_isar4=268501314 652id_isar5=0 653id_mmfr0=270536963 654id_mmfr1=0 655id_mmfr2=19070976 656id_mmfr3=34611729 657id_pfr0=49 658id_pfr1=4113 659midr=1091551472 660pmu=Null 661system=system 662 663[system.cpu.istage2_mmu] 664type=ArmStage2MMU 665children=stage2_tlb 666eventq_index=0 667stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 668sys=system 669tlb=system.cpu.itb 670 671[system.cpu.istage2_mmu.stage2_tlb] 672type=ArmTLB 673children=walker 674eventq_index=0 675is_stage2=true 676size=32 677walker=system.cpu.istage2_mmu.stage2_tlb.walker 678 679[system.cpu.istage2_mmu.stage2_tlb.walker] 680type=ArmTableWalker 681clk_domain=system.cpu_clk_domain 682eventq_index=0 683is_stage2=true 684num_squash_per_cycle=2 685sys=system 686 687[system.cpu.itb] 688type=ArmTLB 689children=walker 690eventq_index=0 691is_stage2=false 692size=64 693walker=system.cpu.itb.walker 694 695[system.cpu.itb.walker] 696type=ArmTableWalker 697clk_domain=system.cpu_clk_domain 698eventq_index=0 699is_stage2=false 700num_squash_per_cycle=2 701sys=system 702port=system.cpu.toL2Bus.slave[2] 703 704[system.cpu.l2cache] 705type=Cache 706children=tags 707addr_ranges=0:18446744073709551615 708assoc=8 709clk_domain=system.cpu_clk_domain 710clusivity=mostly_incl 711demand_mshr_reserve=1 712eventq_index=0 713forward_snoops=true 714hit_latency=20 715is_read_only=false 716max_miss_count=0 717mshrs=20 718prefetch_on_access=false 719prefetcher=Null 720response_latency=20 721sequential_access=false 722size=2097152 723system=system 724tags=system.cpu.l2cache.tags 725tgts_per_mshr=12 726write_buffers=8 727writeback_clean=false 728cpu_side=system.cpu.toL2Bus.master[0] 729mem_side=system.membus.slave[1] 730 731[system.cpu.l2cache.tags] 732type=LRU 733assoc=8 734block_size=64 735clk_domain=system.cpu_clk_domain 736eventq_index=0 737hit_latency=20 738sequential_access=false 739size=2097152 740 741[system.cpu.toL2Bus] 742type=CoherentXBar 743children=snoop_filter 744clk_domain=system.cpu_clk_domain 745eventq_index=0 746forward_latency=0 747frontend_latency=1 748response_latency=1 749snoop_filter=system.cpu.toL2Bus.snoop_filter 750snoop_response_latency=1 751system=system 752use_default_range=false 753width=32 754master=system.cpu.l2cache.cpu_side 755slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 756 757[system.cpu.toL2Bus.snoop_filter] 758type=SnoopFilter 759eventq_index=0 760lookup_latency=0 761max_capacity=8388608 762system=system 763 764[system.cpu.tracer] 765type=ExeTracer 766eventq_index=0 767 768[system.cpu.workload] 769type=LiveProcess 770cmd=hello 771cwd= 772drivers= 773egid=100 774env= 775errout=cerr 776euid=100 777eventq_index=0
778executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello	778executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
779gid=100 780input=cin 781kvmInSE=false 782max_stack_size=67108864 783output=cout 784pid=100 785ppid=99 786simpoint=0 787system=system 788uid=100 789useArchPT=false 790 791[system.cpu_clk_domain] 792type=SrcClockDomain 793clock=500 794domain_id=-1 795eventq_index=0 796init_perf_level=0 797voltage_domain=system.voltage_domain 798 799[system.dvfs_handler] 800type=DVFSHandler 801domains= 802enable=false 803eventq_index=0 804sys_clk_domain=system.clk_domain 805transition_latency=100000000 806 807[system.membus] 808type=CoherentXBar 809clk_domain=system.clk_domain 810eventq_index=0 811forward_latency=4 812frontend_latency=3 813response_latency=2 814snoop_filter=Null 815snoop_response_latency=4 816system=system 817use_default_range=false 818width=16 819master=system.physmem.port 820slave=system.system_port system.cpu.l2cache.mem_side 821 822[system.physmem] 823type=DRAMCtrl 824IDD0=0.075000 825IDD02=0.000000 826IDD2N=0.050000 827IDD2N2=0.000000 828IDD2P0=0.000000 829IDD2P02=0.000000 830IDD2P1=0.000000 831IDD2P12=0.000000 832IDD3N=0.057000 833IDD3N2=0.000000 834IDD3P0=0.000000 835IDD3P02=0.000000 836IDD3P1=0.000000 837IDD3P12=0.000000 838IDD4R=0.187000 839IDD4R2=0.000000 840IDD4W=0.165000 841IDD4W2=0.000000 842IDD5=0.220000 843IDD52=0.000000 844IDD6=0.000000 845IDD62=0.000000 846VDD=1.500000 847VDD2=0.000000 848activation_limit=4 849addr_mapping=RoRaBaCoCh 850bank_groups_per_rank=0 851banks_per_rank=8 852burst_length=8 853channels=1 854clk_domain=system.clk_domain 855conf_table_reported=true 856device_bus_width=8 857device_rowbuffer_size=1024 858device_size=536870912 859devices_per_rank=8 860dll=true 861eventq_index=0 862in_addr_map=true 863max_accesses_per_row=16 864mem_sched_policy=frfcfs 865min_writes_per_switch=16 866null=false 867page_policy=open_adaptive 868range=0:134217727 869ranks_per_channel=2 870read_buffer_size=32 871static_backend_latency=10000 872static_frontend_latency=10000 873tBURST=5000 874tCCD_L=0 875tCK=1250 876tCL=13750 877tCS=2500 878tRAS=35000 879tRCD=13750 880tREFI=7800000 881tRFC=260000 882tRP=13750 883tRRD=6000 884tRRD_L=0 885tRTP=7500 886tRTW=2500 887tWR=15000 888tWTR=7500 889tXAW=30000 890tXP=0 891tXPDLL=0 892tXS=0 893tXSDLL=0 894write_buffer_size=64 895write_high_thresh_perc=85 896write_low_thresh_perc=50 897port=system.membus.master[0] 898 899[system.voltage_domain] 900type=VoltageDomain 901eventq_index=0 902voltage=1.000000 903	779gid=100 780input=cin 781kvmInSE=false 782max_stack_size=67108864 783output=cout 784pid=100 785ppid=99 786simpoint=0 787system=system 788uid=100 789useArchPT=false 790 791[system.cpu_clk_domain] 792type=SrcClockDomain 793clock=500 794domain_id=-1 795eventq_index=0 796init_perf_level=0 797voltage_domain=system.voltage_domain 798 799[system.dvfs_handler] 800type=DVFSHandler 801domains= 802enable=false 803eventq_index=0 804sys_clk_domain=system.clk_domain 805transition_latency=100000000 806 807[system.membus] 808type=CoherentXBar 809clk_domain=system.clk_domain 810eventq_index=0 811forward_latency=4 812frontend_latency=3 813response_latency=2 814snoop_filter=Null 815snoop_response_latency=4 816system=system 817use_default_range=false 818width=16 819master=system.physmem.port 820slave=system.system_port system.cpu.l2cache.mem_side 821 822[system.physmem] 823type=DRAMCtrl 824IDD0=0.075000 825IDD02=0.000000 826IDD2N=0.050000 827IDD2N2=0.000000 828IDD2P0=0.000000 829IDD2P02=0.000000 830IDD2P1=0.000000 831IDD2P12=0.000000 832IDD3N=0.057000 833IDD3N2=0.000000 834IDD3P0=0.000000 835IDD3P02=0.000000 836IDD3P1=0.000000 837IDD3P12=0.000000 838IDD4R=0.187000 839IDD4R2=0.000000 840IDD4W=0.165000 841IDD4W2=0.000000 842IDD5=0.220000 843IDD52=0.000000 844IDD6=0.000000 845IDD62=0.000000 846VDD=1.500000 847VDD2=0.000000 848activation_limit=4 849addr_mapping=RoRaBaCoCh 850bank_groups_per_rank=0 851banks_per_rank=8 852burst_length=8 853channels=1 854clk_domain=system.clk_domain 855conf_table_reported=true 856device_bus_width=8 857device_rowbuffer_size=1024 858device_size=536870912 859devices_per_rank=8 860dll=true 861eventq_index=0 862in_addr_map=true 863max_accesses_per_row=16 864mem_sched_policy=frfcfs 865min_writes_per_switch=16 866null=false 867page_policy=open_adaptive 868range=0:134217727 869ranks_per_channel=2 870read_buffer_size=32 871static_backend_latency=10000 872static_frontend_latency=10000 873tBURST=5000 874tCCD_L=0 875tCK=1250 876tCL=13750 877tCS=2500 878tRAS=35000 879tRCD=13750 880tREFI=7800000 881tRFC=260000 882tRP=13750 883tRRD=6000 884tRRD_L=0 885tRTP=7500 886tRTW=2500 887tWR=15000 888tWTR=7500 889tXAW=30000 890tXP=0 891tXPDLL=0 892tXS=0 893tXSDLL=0 894write_buffer_size=64 895write_high_thresh_perc=85 896write_low_thresh_perc=50 897port=system.membus.master[0] 898 899[system.voltage_domain] 900type=VoltageDomain 901eventq_index=0 902voltage=1.000000 903