1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18exit_on_work_items=false
19init_param=0
20kernel=
21kernel_addr_check=true
22load_addr_mask=1099511627775
23load_offset=0
24mem_mode=timing
25mem_ranges=
26memories=system.physmem
27mmap_using_noreserve=false
28multi_thread=false
29num_work_ids=16
30readfile=
31symbolfile=
32thermal_components=
33thermal_model=Null
34work_begin_ckpt_count=0
35work_begin_cpu_id_exit=-1
36work_begin_exit_count=0
37work_cpus_ckpt_count=0
--- 16 unchanged lines hidden (view full) ---
54branchPred=system.cpu.branchPred
55checker=Null
56clk_domain=system.cpu_clk_domain
57cpu_id=0
58decodeCycleInput=true
59decodeInputBufferSize=3
60decodeInputWidth=2
61decodeToExecuteForwardDelay=1
62do_checkpoint_insts=true
63do_quiesce=true
64do_statistics_insts=true
65dstage2_mmu=system.cpu.dstage2_mmu
66dtb=system.cpu.dtb
67enableIdling=true
68eventq_index=0
69executeAllowEarlyMemoryIssue=true
--- 28 unchanged lines hidden (view full) ---
98isa=system.cpu.isa
99istage2_mmu=system.cpu.istage2_mmu
100itb=system.cpu.itb
101max_insts_all_threads=0
102max_insts_any_thread=0
103max_loads_all_threads=0
104max_loads_any_thread=0
105numThreads=1
106profile=0
107progress_interval=0
108simpoint_start_insts=
109socket_id=0
110switched_out=false
111system=system
112tracer=system.cpu.tracer
113workload=system.cpu.workload
114dcache_port=system.cpu.dcache.cpu_side
115icache_port=system.cpu.icache.cpu_side
116
117[system.cpu.branchPred]
118type=TournamentBP
119BTBEntries=4096
--- 19 unchanged lines hidden (view full) ---
139
140[system.cpu.dcache]
141type=Cache
142children=tags
143addr_ranges=0:18446744073709551615
144assoc=2
145clk_domain=system.cpu_clk_domain
146clusivity=mostly_incl
147demand_mshr_reserve=1
148eventq_index=0
149hit_latency=2
150is_read_only=false
151max_miss_count=0
152mshrs=4
153prefetch_on_access=false
154prefetcher=Null
155response_latency=2
156sequential_access=false
157size=262144
158system=system
159tags=system.cpu.dcache.tags
160tgts_per_mshr=20
161write_buffers=8
162writeback_clean=false
163cpu_side=system.cpu.dcache_port
164mem_side=system.cpu.toL2Bus.slave[1]
165
166[system.cpu.dcache.tags]
167type=LRU
168assoc=2
169block_size=64
170clk_domain=system.cpu_clk_domain
171eventq_index=0
172hit_latency=2
173sequential_access=false
174size=262144
175
176[system.cpu.dstage2_mmu]
177type=ArmStage2MMU
178children=stage2_tlb
179eventq_index=0
180stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
--- 6 unchanged lines hidden (view full) ---
187eventq_index=0
188is_stage2=true
189size=32
190walker=system.cpu.dstage2_mmu.stage2_tlb.walker
191
192[system.cpu.dstage2_mmu.stage2_tlb.walker]
193type=ArmTableWalker
194clk_domain=system.cpu_clk_domain
195eventq_index=0
196is_stage2=true
197num_squash_per_cycle=2
198sys=system
199
200[system.cpu.dtb]
201type=ArmTLB
202children=walker
203eventq_index=0
204is_stage2=false
205size=64
206walker=system.cpu.dtb.walker
207
208[system.cpu.dtb.walker]
209type=ArmTableWalker
210clk_domain=system.cpu_clk_domain
211eventq_index=0
212is_stage2=false
213num_squash_per_cycle=2
214sys=system
215port=system.cpu.toL2Bus.slave[3]
216
217[system.cpu.executeFuncUnits]
218type=MinorFUPool
219children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
220eventq_index=0
221funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
--- 377 unchanged lines hidden (view full) ---
599
600[system.cpu.icache]
601type=Cache
602children=tags
603addr_ranges=0:18446744073709551615
604assoc=2
605clk_domain=system.cpu_clk_domain
606clusivity=mostly_incl
607demand_mshr_reserve=1
608eventq_index=0
609hit_latency=2
610is_read_only=true
611max_miss_count=0
612mshrs=4
613prefetch_on_access=false
614prefetcher=Null
615response_latency=2
616sequential_access=false
617size=131072
618system=system
619tags=system.cpu.icache.tags
620tgts_per_mshr=20
621write_buffers=8
622writeback_clean=true
623cpu_side=system.cpu.icache_port
624mem_side=system.cpu.toL2Bus.slave[0]
625
626[system.cpu.icache.tags]
627type=LRU
628assoc=2
629block_size=64
630clk_domain=system.cpu_clk_domain
631eventq_index=0
632hit_latency=2
633sequential_access=false
634size=131072
635
636[system.cpu.interrupts]
637type=ArmInterrupts
638eventq_index=0
639
640[system.cpu.isa]
--- 41 unchanged lines hidden (view full) ---
682eventq_index=0
683is_stage2=true
684size=32
685walker=system.cpu.istage2_mmu.stage2_tlb.walker
686
687[system.cpu.istage2_mmu.stage2_tlb.walker]
688type=ArmTableWalker
689clk_domain=system.cpu_clk_domain
690eventq_index=0
691is_stage2=true
692num_squash_per_cycle=2
693sys=system
694
695[system.cpu.itb]
696type=ArmTLB
697children=walker
698eventq_index=0
699is_stage2=false
700size=64
701walker=system.cpu.itb.walker
702
703[system.cpu.itb.walker]
704type=ArmTableWalker
705clk_domain=system.cpu_clk_domain
706eventq_index=0
707is_stage2=false
708num_squash_per_cycle=2
709sys=system
710port=system.cpu.toL2Bus.slave[2]
711
712[system.cpu.l2cache]
713type=Cache
714children=tags
715addr_ranges=0:18446744073709551615
716assoc=8
717clk_domain=system.cpu_clk_domain
718clusivity=mostly_incl
719demand_mshr_reserve=1
720eventq_index=0
721hit_latency=20
722is_read_only=false
723max_miss_count=0
724mshrs=20
725prefetch_on_access=false
726prefetcher=Null
727response_latency=20
728sequential_access=false
729size=2097152
730system=system
731tags=system.cpu.l2cache.tags
732tgts_per_mshr=12
733write_buffers=8
734writeback_clean=false
735cpu_side=system.cpu.toL2Bus.master[0]
736mem_side=system.membus.slave[1]
737
738[system.cpu.l2cache.tags]
739type=LRU
740assoc=8
741block_size=64
742clk_domain=system.cpu_clk_domain
743eventq_index=0
744hit_latency=20
745sequential_access=false
746size=2097152
747
748[system.cpu.toL2Bus]
749type=CoherentXBar
750children=snoop_filter
751clk_domain=system.cpu_clk_domain
752eventq_index=0
753forward_latency=0
754frontend_latency=1
755point_of_coherency=false
756response_latency=1
757snoop_filter=system.cpu.toL2Bus.snoop_filter
758snoop_response_latency=1
759system=system
760use_default_range=false
761width=32
762master=system.cpu.l2cache.cpu_side
763slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
--- 14 unchanged lines hidden (view full) ---
778cmd=hello
779cwd=
780drivers=
781egid=100
782env=
783errout=cerr
784euid=100
785eventq_index=0
786executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
787gid=100
788input=cin
789kvmInSE=false
790max_stack_size=67108864
791output=cout
792pid=100
793ppid=99
794simpoint=0
--- 15 unchanged lines hidden (view full) ---
810enable=false
811eventq_index=0
812sys_clk_domain=system.clk_domain
813transition_latency=100000000
814
815[system.membus]
816type=CoherentXBar
817clk_domain=system.clk_domain
818eventq_index=0
819forward_latency=4
820frontend_latency=3
821point_of_coherency=true
822response_latency=2
823snoop_filter=Null
824snoop_response_latency=4
825system=system
826use_default_range=false
827width=16
828master=system.physmem.port
829slave=system.system_port system.cpu.l2cache.mem_side
--- 27 unchanged lines hidden (view full) ---
857activation_limit=4
858addr_mapping=RoRaBaCoCh
859bank_groups_per_rank=0
860banks_per_rank=8
861burst_length=8
862channels=1
863clk_domain=system.clk_domain
864conf_table_reported=true
865device_bus_width=8
866device_rowbuffer_size=1024
867device_size=536870912
868devices_per_rank=8
869dll=true
870eventq_index=0
871in_addr_map=true
872max_accesses_per_row=16
873mem_sched_policy=frfcfs
874min_writes_per_switch=16
875null=false
876page_policy=open_adaptive
877range=0:134217727
878ranks_per_channel=2
879read_buffer_size=32
880static_backend_latency=10000
881static_frontend_latency=10000
882tBURST=5000
883tCCD_L=0
884tCK=1250
--- 28 unchanged lines hidden ---
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18exit_on_work_items=false
19init_param=0
20kernel=
21kernel_addr_check=true
22load_addr_mask=1099511627775
23load_offset=0
24mem_mode=timing
25mem_ranges=
26memories=system.physmem
27mmap_using_noreserve=false
28multi_thread=false
29num_work_ids=16
30readfile=
31symbolfile=
32thermal_components=
33thermal_model=Null
34work_begin_ckpt_count=0
35work_begin_cpu_id_exit=-1
36work_begin_exit_count=0
37work_cpus_ckpt_count=0
--- 16 unchanged lines hidden (view full) ---
54branchPred=system.cpu.branchPred
55checker=Null
56clk_domain=system.cpu_clk_domain
57cpu_id=0
58decodeCycleInput=true
59decodeInputBufferSize=3
60decodeInputWidth=2
61decodeToExecuteForwardDelay=1
62do_checkpoint_insts=true
63do_quiesce=true
64do_statistics_insts=true
65dstage2_mmu=system.cpu.dstage2_mmu
66dtb=system.cpu.dtb
67enableIdling=true
68eventq_index=0
69executeAllowEarlyMemoryIssue=true
--- 28 unchanged lines hidden (view full) ---
98isa=system.cpu.isa
99istage2_mmu=system.cpu.istage2_mmu
100itb=system.cpu.itb
101max_insts_all_threads=0
102max_insts_any_thread=0
103max_loads_all_threads=0
104max_loads_any_thread=0
105numThreads=1
106profile=0
107progress_interval=0
108simpoint_start_insts=
109socket_id=0
110switched_out=false
111system=system
112tracer=system.cpu.tracer
113workload=system.cpu.workload
114dcache_port=system.cpu.dcache.cpu_side
115icache_port=system.cpu.icache.cpu_side
116
117[system.cpu.branchPred]
118type=TournamentBP
119BTBEntries=4096
--- 19 unchanged lines hidden (view full) ---
139
140[system.cpu.dcache]
141type=Cache
142children=tags
143addr_ranges=0:18446744073709551615
144assoc=2
145clk_domain=system.cpu_clk_domain
146clusivity=mostly_incl
147demand_mshr_reserve=1
148eventq_index=0
149hit_latency=2
150is_read_only=false
151max_miss_count=0
152mshrs=4
153prefetch_on_access=false
154prefetcher=Null
155response_latency=2
156sequential_access=false
157size=262144
158system=system
159tags=system.cpu.dcache.tags
160tgts_per_mshr=20
161write_buffers=8
162writeback_clean=false
163cpu_side=system.cpu.dcache_port
164mem_side=system.cpu.toL2Bus.slave[1]
165
166[system.cpu.dcache.tags]
167type=LRU
168assoc=2
169block_size=64
170clk_domain=system.cpu_clk_domain
171eventq_index=0
172hit_latency=2
173sequential_access=false
174size=262144
175
176[system.cpu.dstage2_mmu]
177type=ArmStage2MMU
178children=stage2_tlb
179eventq_index=0
180stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
--- 6 unchanged lines hidden (view full) ---
187eventq_index=0
188is_stage2=true
189size=32
190walker=system.cpu.dstage2_mmu.stage2_tlb.walker
191
192[system.cpu.dstage2_mmu.stage2_tlb.walker]
193type=ArmTableWalker
194clk_domain=system.cpu_clk_domain
195eventq_index=0
196is_stage2=true
197num_squash_per_cycle=2
198sys=system
199
200[system.cpu.dtb]
201type=ArmTLB
202children=walker
203eventq_index=0
204is_stage2=false
205size=64
206walker=system.cpu.dtb.walker
207
208[system.cpu.dtb.walker]
209type=ArmTableWalker
210clk_domain=system.cpu_clk_domain
211eventq_index=0
212is_stage2=false
213num_squash_per_cycle=2
214sys=system
215port=system.cpu.toL2Bus.slave[3]
216
217[system.cpu.executeFuncUnits]
218type=MinorFUPool
219children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
220eventq_index=0
221funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
--- 377 unchanged lines hidden (view full) ---
599
600[system.cpu.icache]
601type=Cache
602children=tags
603addr_ranges=0:18446744073709551615
604assoc=2
605clk_domain=system.cpu_clk_domain
606clusivity=mostly_incl
607demand_mshr_reserve=1
608eventq_index=0
609hit_latency=2
610is_read_only=true
611max_miss_count=0
612mshrs=4
613prefetch_on_access=false
614prefetcher=Null
615response_latency=2
616sequential_access=false
617size=131072
618system=system
619tags=system.cpu.icache.tags
620tgts_per_mshr=20
621write_buffers=8
622writeback_clean=true
623cpu_side=system.cpu.icache_port
624mem_side=system.cpu.toL2Bus.slave[0]
625
626[system.cpu.icache.tags]
627type=LRU
628assoc=2
629block_size=64
630clk_domain=system.cpu_clk_domain
631eventq_index=0
632hit_latency=2
633sequential_access=false
634size=131072
635
636[system.cpu.interrupts]
637type=ArmInterrupts
638eventq_index=0
639
640[system.cpu.isa]
--- 41 unchanged lines hidden (view full) ---
682eventq_index=0
683is_stage2=true
684size=32
685walker=system.cpu.istage2_mmu.stage2_tlb.walker
686
687[system.cpu.istage2_mmu.stage2_tlb.walker]
688type=ArmTableWalker
689clk_domain=system.cpu_clk_domain
690eventq_index=0
691is_stage2=true
692num_squash_per_cycle=2
693sys=system
694
695[system.cpu.itb]
696type=ArmTLB
697children=walker
698eventq_index=0
699is_stage2=false
700size=64
701walker=system.cpu.itb.walker
702
703[system.cpu.itb.walker]
704type=ArmTableWalker
705clk_domain=system.cpu_clk_domain
706eventq_index=0
707is_stage2=false
708num_squash_per_cycle=2
709sys=system
710port=system.cpu.toL2Bus.slave[2]
711
712[system.cpu.l2cache]
713type=Cache
714children=tags
715addr_ranges=0:18446744073709551615
716assoc=8
717clk_domain=system.cpu_clk_domain
718clusivity=mostly_incl
719demand_mshr_reserve=1
720eventq_index=0
721hit_latency=20
722is_read_only=false
723max_miss_count=0
724mshrs=20
725prefetch_on_access=false
726prefetcher=Null
727response_latency=20
728sequential_access=false
729size=2097152
730system=system
731tags=system.cpu.l2cache.tags
732tgts_per_mshr=12
733write_buffers=8
734writeback_clean=false
735cpu_side=system.cpu.toL2Bus.master[0]
736mem_side=system.membus.slave[1]
737
738[system.cpu.l2cache.tags]
739type=LRU
740assoc=8
741block_size=64
742clk_domain=system.cpu_clk_domain
743eventq_index=0
744hit_latency=20
745sequential_access=false
746size=2097152
747
748[system.cpu.toL2Bus]
749type=CoherentXBar
750children=snoop_filter
751clk_domain=system.cpu_clk_domain
752eventq_index=0
753forward_latency=0
754frontend_latency=1
755point_of_coherency=false
756response_latency=1
757snoop_filter=system.cpu.toL2Bus.snoop_filter
758snoop_response_latency=1
759system=system
760use_default_range=false
761width=32
762master=system.cpu.l2cache.cpu_side
763slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
--- 14 unchanged lines hidden (view full) ---
778cmd=hello
779cwd=
780drivers=
781egid=100
782env=
783errout=cerr
784euid=100
785eventq_index=0
786executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
787gid=100
788input=cin
789kvmInSE=false
790max_stack_size=67108864
791output=cout
792pid=100
793ppid=99
794simpoint=0
--- 15 unchanged lines hidden (view full) ---
810enable=false
811eventq_index=0
812sys_clk_domain=system.clk_domain
813transition_latency=100000000
814
815[system.membus]
816type=CoherentXBar
817clk_domain=system.clk_domain
818eventq_index=0
819forward_latency=4
820frontend_latency=3
821point_of_coherency=true
822response_latency=2
823snoop_filter=Null
824snoop_response_latency=4
825system=system
826use_default_range=false
827width=16
828master=system.physmem.port
829slave=system.system_port system.cpu.l2cache.mem_side
--- 27 unchanged lines hidden (view full) ---
857activation_limit=4
858addr_mapping=RoRaBaCoCh
859bank_groups_per_rank=0
860banks_per_rank=8
861burst_length=8
862channels=1
863clk_domain=system.clk_domain
864conf_table_reported=true
865device_bus_width=8
866device_rowbuffer_size=1024
867device_size=536870912
868devices_per_rank=8
869dll=true
870eventq_index=0
871in_addr_map=true
872max_accesses_per_row=16
873mem_sched_policy=frfcfs
874min_writes_per_switch=16
875null=false
876page_policy=open_adaptive
877range=0:134217727
878ranks_per_channel=2
879read_buffer_size=32
880static_backend_latency=10000
881static_frontend_latency=10000
882tBURST=5000
883tCCD_L=0
884tCK=1250
--- 28 unchanged lines hidden ---