stats.txt (11502:e273e86a873d) | stats.txt (11530:6e143fd2cabf) |
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1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.829332 # Number of seconds simulated 4sim_ticks 1829331993500 # Number of ticks simulated 5final_tick 1829331993500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.829332 # Number of seconds simulated 4sim_ticks 1829331993500 # Number of ticks simulated 5final_tick 1829331993500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 1838030 # Simulator instruction rate (inst/s) 8host_op_rate 1838029 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 56003449171 # Simulator tick rate (ticks/s) 10host_mem_usage 325188 # Number of bytes of host memory used 11host_seconds 32.66 # Real time elapsed on the host | 7host_inst_rate 2717372 # Simulator instruction rate (inst/s) 8host_op_rate 2717371 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 82796436895 # Simulator tick rate (ticks/s) 10host_mem_usage 372644 # Number of bytes of host memory used 11host_seconds 22.09 # Real time elapsed on the host |
12sim_insts 60038469 # Number of instructions simulated 13sim_ops 60038469 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks | 12sim_insts 60038469 # Number of instructions simulated 13sim_ops 60038469 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks |
16system.physmem.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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16system.physmem.bytes_read::cpu.inst 850496 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 66835072 # Number of bytes read from this memory 18system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 19system.physmem.bytes_read::total 67686528 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 850496 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 850496 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 7415744 # Number of bytes written to this memory 23system.physmem.bytes_written::total 7415744 # Number of bytes written to this memory --- 11 unchanged lines hidden (view full) --- 35system.physmem.bw_inst_read::total 464922 # Instruction read bandwidth from this memory (bytes/s) 36system.physmem.bw_write::writebacks 4053799 # Write bandwidth from this memory (bytes/s) 37system.physmem.bw_write::total 4053799 # Write bandwidth from this memory (bytes/s) 38system.physmem.bw_total::writebacks 4053799 # Total bandwidth to/from this memory (bytes/s) 39system.physmem.bw_total::cpu.inst 464922 # Total bandwidth to/from this memory (bytes/s) 40system.physmem.bw_total::cpu.data 36535234 # Total bandwidth to/from this memory (bytes/s) 41system.physmem.bw_total::tsunami.ide 525 # Total bandwidth to/from this memory (bytes/s) 42system.physmem.bw_total::total 41054479 # Total bandwidth to/from this memory (bytes/s) | 17system.physmem.bytes_read::cpu.inst 850496 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 66835072 # Number of bytes read from this memory 19system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 20system.physmem.bytes_read::total 67686528 # Number of bytes read from this memory 21system.physmem.bytes_inst_read::cpu.inst 850496 # Number of instructions bytes read from this memory 22system.physmem.bytes_inst_read::total 850496 # Number of instructions bytes read from this memory 23system.physmem.bytes_written::writebacks 7415744 # Number of bytes written to this memory 24system.physmem.bytes_written::total 7415744 # Number of bytes written to this memory --- 11 unchanged lines hidden (view full) --- 36system.physmem.bw_inst_read::total 464922 # Instruction read bandwidth from this memory (bytes/s) 37system.physmem.bw_write::writebacks 4053799 # Write bandwidth from this memory (bytes/s) 38system.physmem.bw_write::total 4053799 # Write bandwidth from this memory (bytes/s) 39system.physmem.bw_total::writebacks 4053799 # Total bandwidth to/from this memory (bytes/s) 40system.physmem.bw_total::cpu.inst 464922 # Total bandwidth to/from this memory (bytes/s) 41system.physmem.bw_total::cpu.data 36535234 # Total bandwidth to/from this memory (bytes/s) 42system.physmem.bw_total::tsunami.ide 525 # Total bandwidth to/from this memory (bytes/s) 43system.physmem.bw_total::total 41054479 # Total bandwidth to/from this memory (bytes/s) |
44system.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 45system.bridge.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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43system.cpu_clk_domain.clock 500 # Clock period in ticks 44system.cpu.dtb.fetch_hits 0 # ITB hits 45system.cpu.dtb.fetch_misses 0 # ITB misses 46system.cpu.dtb.fetch_acv 0 # ITB acv 47system.cpu.dtb.fetch_accesses 0 # ITB accesses 48system.cpu.dtb.read_hits 9710423 # DTB read hits 49system.cpu.dtb.read_misses 10329 # DTB read misses 50system.cpu.dtb.read_acv 210 # DTB read access violations --- 17 unchanged lines hidden (view full) --- 68system.cpu.itb.write_hits 0 # DTB write hits 69system.cpu.itb.write_misses 0 # DTB write misses 70system.cpu.itb.write_acv 0 # DTB write access violations 71system.cpu.itb.write_accesses 0 # DTB write accesses 72system.cpu.itb.data_hits 0 # DTB hits 73system.cpu.itb.data_misses 0 # DTB misses 74system.cpu.itb.data_acv 0 # DTB access violations 75system.cpu.itb.data_accesses 0 # DTB accesses | 46system.cpu_clk_domain.clock 500 # Clock period in ticks 47system.cpu.dtb.fetch_hits 0 # ITB hits 48system.cpu.dtb.fetch_misses 0 # ITB misses 49system.cpu.dtb.fetch_acv 0 # ITB acv 50system.cpu.dtb.fetch_accesses 0 # ITB accesses 51system.cpu.dtb.read_hits 9710423 # DTB read hits 52system.cpu.dtb.read_misses 10329 # DTB read misses 53system.cpu.dtb.read_acv 210 # DTB read access violations --- 17 unchanged lines hidden (view full) --- 71system.cpu.itb.write_hits 0 # DTB write hits 72system.cpu.itb.write_misses 0 # DTB write misses 73system.cpu.itb.write_acv 0 # DTB write access violations 74system.cpu.itb.write_accesses 0 # DTB write accesses 75system.cpu.itb.data_hits 0 # DTB hits 76system.cpu.itb.data_misses 0 # DTB misses 77system.cpu.itb.data_acv 0 # DTB access violations 78system.cpu.itb.data_accesses 0 # DTB accesses |
79system.cpu.numPwrStateTransitions 12714 # Number of power state transitions 80system.cpu.pwrStateClkGateDist::samples 6357 # Distribution of time spent in the clock gated state 81system.cpu.pwrStateClkGateDist::mean 283043475.573698 # Distribution of time spent in the clock gated state 82system.cpu.pwrStateClkGateDist::stdev 441371914.604153 # Distribution of time spent in the clock gated state 83system.cpu.pwrStateClkGateDist::1000-5e+10 6357 100.00% 100.00% # Distribution of time spent in the clock gated state 84system.cpu.pwrStateClkGateDist::min_value 386000 # Distribution of time spent in the clock gated state 85system.cpu.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state 86system.cpu.pwrStateClkGateDist::total 6357 # Distribution of time spent in the clock gated state 87system.cpu.pwrStateResidencyTicks::ON 30024619278 # Cumulative time (in ticks) in various power states 88system.cpu.pwrStateResidencyTicks::CLK_GATED 1799307374222 # Cumulative time (in ticks) in various power states |
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76system.cpu.numCycles 3658670345 # number of cpu cycles simulated 77system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 78system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 79system.cpu.kern.inst.arm 0 # number of arm instructions executed 80system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed 81system.cpu.kern.inst.hwrei 211318 # number of hwrei instructions executed 82system.cpu.kern.ipl_count::0 74830 40.99% 40.99% # number of times we switched to this ipl 83system.cpu.kern.ipl_count::21 243 0.13% 41.12% # number of times we switched to this ipl --- 127 unchanged lines hidden (view full) --- 211system.cpu.op_class::SimdFloatMult 0 0.00% 71.19% # Class of executed instruction 212system.cpu.op_class::SimdFloatMultAcc 0 0.00% 71.19% # Class of executed instruction 213system.cpu.op_class::SimdFloatSqrt 0 0.00% 71.19% # Class of executed instruction 214system.cpu.op_class::MemRead 9975077 16.61% 87.80% # Class of executed instruction 215system.cpu.op_class::MemWrite 6374115 10.61% 98.42% # Class of executed instruction 216system.cpu.op_class::IprAccess 951209 1.58% 100.00% # Class of executed instruction 217system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 218system.cpu.op_class::total 60050307 # Class of executed instruction | 89system.cpu.numCycles 3658670345 # number of cpu cycles simulated 90system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 91system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 92system.cpu.kern.inst.arm 0 # number of arm instructions executed 93system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed 94system.cpu.kern.inst.hwrei 211318 # number of hwrei instructions executed 95system.cpu.kern.ipl_count::0 74830 40.99% 40.99% # number of times we switched to this ipl 96system.cpu.kern.ipl_count::21 243 0.13% 41.12% # number of times we switched to this ipl --- 127 unchanged lines hidden (view full) --- 224system.cpu.op_class::SimdFloatMult 0 0.00% 71.19% # Class of executed instruction 225system.cpu.op_class::SimdFloatMultAcc 0 0.00% 71.19% # Class of executed instruction 226system.cpu.op_class::SimdFloatSqrt 0 0.00% 71.19% # Class of executed instruction 227system.cpu.op_class::MemRead 9975077 16.61% 87.80% # Class of executed instruction 228system.cpu.op_class::MemWrite 6374115 10.61% 98.42% # Class of executed instruction 229system.cpu.op_class::IprAccess 951209 1.58% 100.00% # Class of executed instruction 230system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 231system.cpu.op_class::total 60050307 # Class of executed instruction |
232system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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219system.cpu.dcache.tags.replacements 2042707 # number of replacements 220system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use 221system.cpu.dcache.tags.total_refs 14038420 # Total number of references to valid blocks. 222system.cpu.dcache.tags.sampled_refs 2043219 # Sample count of references to valid blocks. 223system.cpu.dcache.tags.avg_refs 6.870737 # Average number of references to valid blocks. 224system.cpu.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 225system.cpu.dcache.tags.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor 226system.cpu.dcache.tags.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy 227system.cpu.dcache.tags.occ_percent::total 0.999996 # Average percentage of cache occupancy 228system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 229system.cpu.dcache.tags.age_task_id_blocks_1024::0 443 # Occupied blocks per task id 230system.cpu.dcache.tags.age_task_id_blocks_1024::1 66 # Occupied blocks per task id 231system.cpu.dcache.tags.age_task_id_blocks_1024::2 3 # Occupied blocks per task id 232system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 233system.cpu.dcache.tags.tag_accesses 66369780 # Number of tag accesses 234system.cpu.dcache.tags.data_accesses 66369780 # Number of data accesses | 233system.cpu.dcache.tags.replacements 2042707 # number of replacements 234system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use 235system.cpu.dcache.tags.total_refs 14038420 # Total number of references to valid blocks. 236system.cpu.dcache.tags.sampled_refs 2043219 # Sample count of references to valid blocks. 237system.cpu.dcache.tags.avg_refs 6.870737 # Average number of references to valid blocks. 238system.cpu.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 239system.cpu.dcache.tags.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor 240system.cpu.dcache.tags.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy 241system.cpu.dcache.tags.occ_percent::total 0.999996 # Average percentage of cache occupancy 242system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 243system.cpu.dcache.tags.age_task_id_blocks_1024::0 443 # Occupied blocks per task id 244system.cpu.dcache.tags.age_task_id_blocks_1024::1 66 # Occupied blocks per task id 245system.cpu.dcache.tags.age_task_id_blocks_1024::2 3 # Occupied blocks per task id 246system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 247system.cpu.dcache.tags.tag_accesses 66369780 # Number of tag accesses 248system.cpu.dcache.tags.data_accesses 66369780 # Number of data accesses |
249system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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235system.cpu.dcache.ReadReq_hits::cpu.data 7807771 # number of ReadReq hits 236system.cpu.dcache.ReadReq_hits::total 7807771 # number of ReadReq hits 237system.cpu.dcache.WriteReq_hits::cpu.data 5848210 # number of WriteReq hits 238system.cpu.dcache.WriteReq_hits::total 5848210 # number of WriteReq hits 239system.cpu.dcache.LoadLockedReq_hits::cpu.data 183141 # number of LoadLockedReq hits 240system.cpu.dcache.LoadLockedReq_hits::total 183141 # number of LoadLockedReq hits 241system.cpu.dcache.StoreCondReq_hits::cpu.data 199282 # number of StoreCondReq hits 242system.cpu.dcache.StoreCondReq_hits::total 199282 # number of StoreCondReq hits --- 36 unchanged lines hidden (view full) --- 279system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 280system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 281system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 282system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 283system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 284system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 285system.cpu.dcache.writebacks::writebacks 833475 # number of writebacks 286system.cpu.dcache.writebacks::total 833475 # number of writebacks | 250system.cpu.dcache.ReadReq_hits::cpu.data 7807771 # number of ReadReq hits 251system.cpu.dcache.ReadReq_hits::total 7807771 # number of ReadReq hits 252system.cpu.dcache.WriteReq_hits::cpu.data 5848210 # number of WriteReq hits 253system.cpu.dcache.WriteReq_hits::total 5848210 # number of WriteReq hits 254system.cpu.dcache.LoadLockedReq_hits::cpu.data 183141 # number of LoadLockedReq hits 255system.cpu.dcache.LoadLockedReq_hits::total 183141 # number of LoadLockedReq hits 256system.cpu.dcache.StoreCondReq_hits::cpu.data 199282 # number of StoreCondReq hits 257system.cpu.dcache.StoreCondReq_hits::total 199282 # number of StoreCondReq hits --- 36 unchanged lines hidden (view full) --- 294system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 295system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 296system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 297system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 298system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 299system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 300system.cpu.dcache.writebacks::writebacks 833475 # number of writebacks 301system.cpu.dcache.writebacks::total 833475 # number of writebacks |
302system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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287system.cpu.icache.tags.replacements 919603 # number of replacements 288system.cpu.icache.tags.tagsinuse 511.215257 # Cycle average of tags in use 289system.cpu.icache.tags.total_refs 59130077 # Total number of references to valid blocks. 290system.cpu.icache.tags.sampled_refs 920115 # Sample count of references to valid blocks. 291system.cpu.icache.tags.avg_refs 64.263790 # Average number of references to valid blocks. 292system.cpu.icache.tags.warmup_cycle 9686452000 # Cycle when the warmup percentage was hit. 293system.cpu.icache.tags.occ_blocks::cpu.inst 511.215257 # Average occupied blocks per requestor 294system.cpu.icache.tags.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy 295system.cpu.icache.tags.occ_percent::total 0.998467 # Average percentage of cache occupancy 296system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 297system.cpu.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 298system.cpu.icache.tags.age_task_id_blocks_1024::1 117 # Occupied blocks per task id 299system.cpu.icache.tags.age_task_id_blocks_1024::2 332 # Occupied blocks per task id 300system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 301system.cpu.icache.tags.tag_accesses 60970537 # Number of tag accesses 302system.cpu.icache.tags.data_accesses 60970537 # Number of data accesses | 303system.cpu.icache.tags.replacements 919603 # number of replacements 304system.cpu.icache.tags.tagsinuse 511.215257 # Cycle average of tags in use 305system.cpu.icache.tags.total_refs 59130077 # Total number of references to valid blocks. 306system.cpu.icache.tags.sampled_refs 920115 # Sample count of references to valid blocks. 307system.cpu.icache.tags.avg_refs 64.263790 # Average number of references to valid blocks. 308system.cpu.icache.tags.warmup_cycle 9686452000 # Cycle when the warmup percentage was hit. 309system.cpu.icache.tags.occ_blocks::cpu.inst 511.215257 # Average occupied blocks per requestor 310system.cpu.icache.tags.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy 311system.cpu.icache.tags.occ_percent::total 0.998467 # Average percentage of cache occupancy 312system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 313system.cpu.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 314system.cpu.icache.tags.age_task_id_blocks_1024::1 117 # Occupied blocks per task id 315system.cpu.icache.tags.age_task_id_blocks_1024::2 332 # Occupied blocks per task id 316system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 317system.cpu.icache.tags.tag_accesses 60970537 # Number of tag accesses 318system.cpu.icache.tags.data_accesses 60970537 # Number of data accesses |
319system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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303system.cpu.icache.ReadReq_hits::cpu.inst 59130077 # number of ReadReq hits 304system.cpu.icache.ReadReq_hits::total 59130077 # number of ReadReq hits 305system.cpu.icache.demand_hits::cpu.inst 59130077 # number of demand (read+write) hits 306system.cpu.icache.demand_hits::total 59130077 # number of demand (read+write) hits 307system.cpu.icache.overall_hits::cpu.inst 59130077 # number of overall hits 308system.cpu.icache.overall_hits::total 59130077 # number of overall hits 309system.cpu.icache.ReadReq_misses::cpu.inst 920230 # number of ReadReq misses 310system.cpu.icache.ReadReq_misses::total 920230 # number of ReadReq misses --- 16 unchanged lines hidden (view full) --- 327system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 328system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 329system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 330system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 331system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 332system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 333system.cpu.icache.writebacks::writebacks 919603 # number of writebacks 334system.cpu.icache.writebacks::total 919603 # number of writebacks | 320system.cpu.icache.ReadReq_hits::cpu.inst 59130077 # number of ReadReq hits 321system.cpu.icache.ReadReq_hits::total 59130077 # number of ReadReq hits 322system.cpu.icache.demand_hits::cpu.inst 59130077 # number of demand (read+write) hits 323system.cpu.icache.demand_hits::total 59130077 # number of demand (read+write) hits 324system.cpu.icache.overall_hits::cpu.inst 59130077 # number of overall hits 325system.cpu.icache.overall_hits::total 59130077 # number of overall hits 326system.cpu.icache.ReadReq_misses::cpu.inst 920230 # number of ReadReq misses 327system.cpu.icache.ReadReq_misses::total 920230 # number of ReadReq misses --- 16 unchanged lines hidden (view full) --- 344system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 345system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 346system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 347system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 348system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 349system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 350system.cpu.icache.writebacks::writebacks 919603 # number of writebacks 351system.cpu.icache.writebacks::total 919603 # number of writebacks |
352system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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335system.cpu.l2cache.tags.replacements 992419 # number of replacements 336system.cpu.l2cache.tags.tagsinuse 65424.374401 # Cycle average of tags in use 337system.cpu.l2cache.tags.total_refs 4560132 # Total number of references to valid blocks. 338system.cpu.l2cache.tags.sampled_refs 1057582 # Sample count of references to valid blocks. 339system.cpu.l2cache.tags.avg_refs 4.311847 # Average number of references to valid blocks. 340system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit. 341system.cpu.l2cache.tags.occ_blocks::writebacks 56331.541205 # Average occupied blocks per requestor 342system.cpu.l2cache.tags.occ_blocks::cpu.inst 4843.327000 # Average occupied blocks per requestor --- 6 unchanged lines hidden (view full) --- 349system.cpu.l2cache.tags.age_task_id_blocks_1024::0 781 # Occupied blocks per task id 350system.cpu.l2cache.tags.age_task_id_blocks_1024::1 3260 # Occupied blocks per task id 351system.cpu.l2cache.tags.age_task_id_blocks_1024::2 4024 # Occupied blocks per task id 352system.cpu.l2cache.tags.age_task_id_blocks_1024::3 3046 # Occupied blocks per task id 353system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54052 # Occupied blocks per task id 354system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994308 # Percentage of cache occupancy per task id 355system.cpu.l2cache.tags.tag_accesses 48753652 # Number of tag accesses 356system.cpu.l2cache.tags.data_accesses 48753652 # Number of data accesses | 353system.cpu.l2cache.tags.replacements 992419 # number of replacements 354system.cpu.l2cache.tags.tagsinuse 65424.374401 # Cycle average of tags in use 355system.cpu.l2cache.tags.total_refs 4560132 # Total number of references to valid blocks. 356system.cpu.l2cache.tags.sampled_refs 1057582 # Sample count of references to valid blocks. 357system.cpu.l2cache.tags.avg_refs 4.311847 # Average number of references to valid blocks. 358system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit. 359system.cpu.l2cache.tags.occ_blocks::writebacks 56331.541205 # Average occupied blocks per requestor 360system.cpu.l2cache.tags.occ_blocks::cpu.inst 4843.327000 # Average occupied blocks per requestor --- 6 unchanged lines hidden (view full) --- 367system.cpu.l2cache.tags.age_task_id_blocks_1024::0 781 # Occupied blocks per task id 368system.cpu.l2cache.tags.age_task_id_blocks_1024::1 3260 # Occupied blocks per task id 369system.cpu.l2cache.tags.age_task_id_blocks_1024::2 4024 # Occupied blocks per task id 370system.cpu.l2cache.tags.age_task_id_blocks_1024::3 3046 # Occupied blocks per task id 371system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54052 # Occupied blocks per task id 372system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994308 # Percentage of cache occupancy per task id 373system.cpu.l2cache.tags.tag_accesses 48753652 # Number of tag accesses 374system.cpu.l2cache.tags.data_accesses 48753652 # Number of data accesses |
375system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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357system.cpu.l2cache.WritebackDirty_hits::writebacks 833475 # number of WritebackDirty hits 358system.cpu.l2cache.WritebackDirty_hits::total 833475 # number of WritebackDirty hits 359system.cpu.l2cache.WritebackClean_hits::writebacks 919351 # number of WritebackClean hits 360system.cpu.l2cache.WritebackClean_hits::total 919351 # number of WritebackClean hits 361system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits 362system.cpu.l2cache.UpgradeReq_hits::total 4 # number of UpgradeReq hits 363system.cpu.l2cache.ReadExReq_hits::cpu.data 187286 # number of ReadExReq hits 364system.cpu.l2cache.ReadExReq_hits::total 187286 # number of ReadExReq hits --- 62 unchanged lines hidden (view full) --- 427system.cpu.l2cache.writebacks::writebacks 74359 # number of writebacks 428system.cpu.l2cache.writebacks::total 74359 # number of writebacks 429system.cpu.toL2Bus.snoop_filter.tot_requests 5925776 # Total number of requests made to the snoop filter. 430system.cpu.toL2Bus.snoop_filter.hit_single_requests 2962432 # Number of requests hitting in the snoop filter with a single holder of the requested data. 431system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1834 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 432system.cpu.toL2Bus.snoop_filter.tot_snoops 1449 # Total number of snoops made to the snoop filter. 433system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1449 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 434system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 376system.cpu.l2cache.WritebackDirty_hits::writebacks 833475 # number of WritebackDirty hits 377system.cpu.l2cache.WritebackDirty_hits::total 833475 # number of WritebackDirty hits 378system.cpu.l2cache.WritebackClean_hits::writebacks 919351 # number of WritebackClean hits 379system.cpu.l2cache.WritebackClean_hits::total 919351 # number of WritebackClean hits 380system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits 381system.cpu.l2cache.UpgradeReq_hits::total 4 # number of UpgradeReq hits 382system.cpu.l2cache.ReadExReq_hits::cpu.data 187286 # number of ReadExReq hits 383system.cpu.l2cache.ReadExReq_hits::total 187286 # number of ReadExReq hits --- 62 unchanged lines hidden (view full) --- 446system.cpu.l2cache.writebacks::writebacks 74359 # number of writebacks 447system.cpu.l2cache.writebacks::total 74359 # number of writebacks 448system.cpu.toL2Bus.snoop_filter.tot_requests 5925776 # Total number of requests made to the snoop filter. 449system.cpu.toL2Bus.snoop_filter.hit_single_requests 2962432 # Number of requests hitting in the snoop filter with a single holder of the requested data. 450system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1834 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 451system.cpu.toL2Bus.snoop_filter.tot_snoops 1449 # Total number of snoops made to the snoop filter. 452system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1449 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 453system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
454system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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435system.cpu.toL2Bus.trans_dist::ReadReq 7184 # Transaction distribution 436system.cpu.toL2Bus.trans_dist::ReadResp 2666288 # Transaction distribution 437system.cpu.toL2Bus.trans_dist::WriteReq 9838 # Transaction distribution 438system.cpu.toL2Bus.trans_dist::WriteResp 9838 # Transaction distribution 439system.cpu.toL2Bus.trans_dist::WritebackDirty 833475 # Transaction distribution 440system.cpu.toL2Bus.trans_dist::WritebackClean 919603 # Transaction distribution 441system.cpu.toL2Bus.trans_dist::CleanEvict 1209232 # Transaction distribution 442system.cpu.toL2Bus.trans_dist::UpgradeReq 16 # Transaction distribution --- 27 unchanged lines hidden (view full) --- 470system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 471system.disk0.dma_write_txs 395 # Number of DMA write transactions. 472system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 473system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 474system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 475system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 476system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 477system.disk2.dma_write_txs 1 # Number of DMA write transactions. | 455system.cpu.toL2Bus.trans_dist::ReadReq 7184 # Transaction distribution 456system.cpu.toL2Bus.trans_dist::ReadResp 2666288 # Transaction distribution 457system.cpu.toL2Bus.trans_dist::WriteReq 9838 # Transaction distribution 458system.cpu.toL2Bus.trans_dist::WriteResp 9838 # Transaction distribution 459system.cpu.toL2Bus.trans_dist::WritebackDirty 833475 # Transaction distribution 460system.cpu.toL2Bus.trans_dist::WritebackClean 919603 # Transaction distribution 461system.cpu.toL2Bus.trans_dist::CleanEvict 1209232 # Transaction distribution 462system.cpu.toL2Bus.trans_dist::UpgradeReq 16 # Transaction distribution --- 27 unchanged lines hidden (view full) --- 490system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 491system.disk0.dma_write_txs 395 # Number of DMA write transactions. 492system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 493system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 494system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 495system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 496system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 497system.disk2.dma_write_txs 1 # Number of DMA write transactions. |
498system.iobus.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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478system.iobus.trans_dist::ReadReq 7358 # Transaction distribution 479system.iobus.trans_dist::ReadResp 7358 # Transaction distribution 480system.iobus.trans_dist::WriteReq 51390 # Transaction distribution 481system.iobus.trans_dist::WriteResp 51390 # Transaction distribution 482system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 5248 # Packet count per connected master and slave (bytes) 483system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1010 # Packet count per connected master and slave (bytes) 484system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 485system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 500system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9006 # Cumulative packet size per connected master and slave (bytes) 501system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 7596 # Cumulative packet size per connected master and slave (bytes) 502system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 503system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 504system.iobus.pkt_size_system.bridge.master::total 46126 # Cumulative packet size per connected master and slave (bytes) 505system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661616 # Cumulative packet size per connected master and slave (bytes) 506system.iobus.pkt_size_system.tsunami.ide.dma::total 2661616 # Cumulative packet size per connected master and slave (bytes) 507system.iobus.pkt_size::total 2707742 # Cumulative packet size per connected master and slave (bytes) | 499system.iobus.trans_dist::ReadReq 7358 # Transaction distribution 500system.iobus.trans_dist::ReadResp 7358 # Transaction distribution 501system.iobus.trans_dist::WriteReq 51390 # Transaction distribution 502system.iobus.trans_dist::WriteResp 51390 # Transaction distribution 503system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 5248 # Packet count per connected master and slave (bytes) 504system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1010 # Packet count per connected master and slave (bytes) 505system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 506system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 521system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9006 # Cumulative packet size per connected master and slave (bytes) 522system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 7596 # Cumulative packet size per connected master and slave (bytes) 523system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 524system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 525system.iobus.pkt_size_system.bridge.master::total 46126 # Cumulative packet size per connected master and slave (bytes) 526system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661616 # Cumulative packet size per connected master and slave (bytes) 527system.iobus.pkt_size_system.tsunami.ide.dma::total 2661616 # Cumulative packet size per connected master and slave (bytes) 528system.iobus.pkt_size::total 2707742 # Cumulative packet size per connected master and slave (bytes) |
529system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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508system.iocache.tags.replacements 41686 # number of replacements 509system.iocache.tags.tagsinuse 1.225569 # Cycle average of tags in use 510system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 511system.iocache.tags.sampled_refs 41702 # Sample count of references to valid blocks. 512system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 513system.iocache.tags.warmup_cycle 1685780587017 # Cycle when the warmup percentage was hit. 514system.iocache.tags.occ_blocks::tsunami.ide 1.225569 # Average occupied blocks per requestor 515system.iocache.tags.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy 516system.iocache.tags.occ_percent::total 0.076598 # Average percentage of cache occupancy 517system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 518system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 519system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 520system.iocache.tags.tag_accesses 375534 # Number of tag accesses 521system.iocache.tags.data_accesses 375534 # Number of data accesses | 530system.iocache.tags.replacements 41686 # number of replacements 531system.iocache.tags.tagsinuse 1.225569 # Cycle average of tags in use 532system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 533system.iocache.tags.sampled_refs 41702 # Sample count of references to valid blocks. 534system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 535system.iocache.tags.warmup_cycle 1685780587017 # Cycle when the warmup percentage was hit. 536system.iocache.tags.occ_blocks::tsunami.ide 1.225569 # Average occupied blocks per requestor 537system.iocache.tags.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy 538system.iocache.tags.occ_percent::total 0.076598 # Average percentage of cache occupancy 539system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 540system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 541system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 542system.iocache.tags.tag_accesses 375534 # Number of tag accesses 543system.iocache.tags.data_accesses 375534 # Number of data accesses |
544system.iocache.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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522system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses 523system.iocache.ReadReq_misses::total 174 # number of ReadReq misses 524system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 525system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 526system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses 527system.iocache.demand_misses::total 41726 # number of demand (read+write) misses 528system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses 529system.iocache.overall_misses::total 41726 # number of overall misses --- 16 unchanged lines hidden (view full) --- 546system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 547system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 548system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 549system.iocache.blocked::no_targets 0 # number of cycles access was blocked 550system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 551system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 552system.iocache.writebacks::writebacks 41512 # number of writebacks 553system.iocache.writebacks::total 41512 # number of writebacks | 545system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses 546system.iocache.ReadReq_misses::total 174 # number of ReadReq misses 547system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 548system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 549system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses 550system.iocache.demand_misses::total 41726 # number of demand (read+write) misses 551system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses 552system.iocache.overall_misses::total 41726 # number of overall misses --- 16 unchanged lines hidden (view full) --- 569system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 570system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 571system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 572system.iocache.blocked::no_targets 0 # number of cycles access was blocked 573system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 574system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 575system.iocache.writebacks::writebacks 41512 # number of writebacks 576system.iocache.writebacks::total 41512 # number of writebacks |
577system.membus.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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554system.membus.trans_dist::ReadReq 7184 # Transaction distribution 555system.membus.trans_dist::ReadResp 948291 # Transaction distribution 556system.membus.trans_dist::WriteReq 9838 # Transaction distribution 557system.membus.trans_dist::WriteResp 9838 # Transaction distribution 558system.membus.trans_dist::WritebackDirty 115871 # Transaction distribution 559system.membus.trans_dist::CleanEvict 917188 # Transaction distribution 560system.membus.trans_dist::UpgradeReq 147 # Transaction distribution 561system.membus.trans_dist::UpgradeResp 147 # Transaction distribution --- 21 unchanged lines hidden (view full) --- 583system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 584system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 585system.membus.snoop_fanout::1 2149812 100.00% 100.00% # Request fanout histogram 586system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 587system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 588system.membus.snoop_fanout::min_value 1 # Request fanout histogram 589system.membus.snoop_fanout::max_value 1 # Request fanout histogram 590system.membus.snoop_fanout::total 2149812 # Request fanout histogram | 578system.membus.trans_dist::ReadReq 7184 # Transaction distribution 579system.membus.trans_dist::ReadResp 948291 # Transaction distribution 580system.membus.trans_dist::WriteReq 9838 # Transaction distribution 581system.membus.trans_dist::WriteResp 9838 # Transaction distribution 582system.membus.trans_dist::WritebackDirty 115871 # Transaction distribution 583system.membus.trans_dist::CleanEvict 917188 # Transaction distribution 584system.membus.trans_dist::UpgradeReq 147 # Transaction distribution 585system.membus.trans_dist::UpgradeResp 147 # Transaction distribution --- 21 unchanged lines hidden (view full) --- 607system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 608system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 609system.membus.snoop_fanout::1 2149812 100.00% 100.00% # Request fanout histogram 610system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 611system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 612system.membus.snoop_fanout::min_value 1 # Request fanout histogram 613system.membus.snoop_fanout::max_value 1 # Request fanout histogram 614system.membus.snoop_fanout::total 2149812 # Request fanout histogram |
615system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 616system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 617system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 618system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 619system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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591system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 592system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 593system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 594system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 595system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 596system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 597system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 598system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU --- 15 unchanged lines hidden (view full) --- 614system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 615system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 616system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 617system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 618system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 619system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 620system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 621system.tsunami.ethernet.droppedPackets 0 # number of packets dropped | 620system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 621system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 622system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 623system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 624system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 625system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 626system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 627system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU --- 15 unchanged lines hidden (view full) --- 643system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 644system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 645system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 646system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 647system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 648system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 649system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 650system.tsunami.ethernet.droppedPackets 0 # number of packets dropped |
651system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 652system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 653system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 654system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 655system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 656system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 657system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 658system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 659system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 660system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 661system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 662system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 663system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 664system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 665system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 666system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 667system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 668system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 669system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 670system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 671system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 672system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states 673system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1829331993500 # Cumulative time (in ticks) in various power states |
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622 623---------- End Simulation Statistics ---------- | 674 675---------- End Simulation Statistics ---------- |