Cross Reference: /gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt

1
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.829332 # Number of seconds simulated
4sim_ticks 1829332258000 # Number of ticks simulated
5final_tick 1829332258000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks

7host_inst_rate 4111639 # Simulator instruction rate (inst/s)
8host_op_rate 4111633 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 125278906724 # Simulator tick rate (ticks/s)
10host_mem_usage 291412 # Number of bytes of host memory used
11host_seconds 14.60 # Real time elapsed on the host

7host_inst_rate 1921293 # Simulator instruction rate (inst/s)
8host_op_rate 1921291 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 58540553267 # Simulator tick rate (ticks/s)
10host_mem_usage 295828 # Number of bytes of host memory used
11host_seconds 31.25 # Real time elapsed on the host

12sim_insts 60038305 # Number of instructions simulated
13sim_ops 60038305 # Number of ops (including micro ops) simulated
14system.physmem.bytes_read 71650816 # Number of bytes read from this memory
15system.physmem.bytes_inst_read 955904 # Number of instructions bytes read from this memory
16system.physmem.bytes_written 10156864 # Number of bytes written to this memory
17system.physmem.num_reads 1119544 # Number of read requests responded to by this memory
18system.physmem.num_writes 158701 # Number of write requests responded to by this memory
19system.physmem.num_other 0 # Number of other requests responded to by this memory
20system.physmem.bw_read 39167743 # Total read bandwidth from this memory (bytes/s)
21system.physmem.bw_inst_read 522543 # Instruction read bandwidth from this memory (bytes/s)
22system.physmem.bw_write 5552225 # Write bandwidth from this memory (bytes/s)
23system.physmem.bw_total 44719968 # Total bandwidth to/from this memory (bytes/s)
24system.l2c.replacements 1045877 # number of replacements
25system.l2c.tagsinuse 33807.015903 # Cycle average of tags in use
26system.l2c.total_refs 2291835 # Total number of references to valid blocks.
27system.l2c.sampled_refs 1077848 # Sample count of references to valid blocks.
28system.l2c.avg_refs 2.126306 # Average number of references to valid blocks.
29system.l2c.warmup_cycle 765422500 # Cycle when the warmup percentage was hit.
30system.l2c.occ_blocks::writebacks 23613.410409 # Average occupied blocks per requestor
31system.l2c.occ_blocks::cpu.inst 3680.391656 # Average occupied blocks per requestor
32system.l2c.occ_blocks::cpu.data 6513.213838 # Average occupied blocks per requestor
33system.l2c.occ_percent::writebacks 0.360312 # Average percentage of cache occupancy
34system.l2c.occ_percent::cpu.inst 0.056158 # Average percentage of cache occupancy
35system.l2c.occ_percent::cpu.data 0.099384 # Average percentage of cache occupancy
36system.l2c.occ_percent::total 0.515854 # Average percentage of cache occupancy
37system.l2c.ReadReq_hits::cpu.inst 905267 # number of ReadReq hits
38system.l2c.ReadReq_hits::cpu.data 794128 # number of ReadReq hits
39system.l2c.ReadReq_hits::total 1699395 # number of ReadReq hits
40system.l2c.Writeback_hits::writebacks 825291 # number of Writeback hits
41system.l2c.Writeback_hits::total 825291 # number of Writeback hits
42system.l2c.UpgradeReq_hits::cpu.data 1 # number of UpgradeReq hits
43system.l2c.UpgradeReq_hits::total 1 # number of UpgradeReq hits
44system.l2c.ReadExReq_hits::cpu.data 185383 # number of ReadExReq hits
45system.l2c.ReadExReq_hits::total 185383 # number of ReadExReq hits
46system.l2c.demand_hits::cpu.inst 905267 # number of demand (read+write) hits
47system.l2c.demand_hits::cpu.data 979511 # number of demand (read+write) hits
48system.l2c.demand_hits::total 1884778 # number of demand (read+write) hits
49system.l2c.overall_hits::cpu.inst 905267 # number of overall hits
50system.l2c.overall_hits::cpu.data 979511 # number of overall hits
51system.l2c.overall_hits::total 1884778 # number of overall hits
52system.l2c.ReadReq_misses::cpu.inst 14936 # number of ReadReq misses
53system.l2c.ReadReq_misses::cpu.data 944693 # number of ReadReq misses
54system.l2c.ReadReq_misses::total 959629 # number of ReadReq misses
55system.l2c.UpgradeReq_misses::cpu.data 12 # number of UpgradeReq misses
56system.l2c.UpgradeReq_misses::total 12 # number of UpgradeReq misses
57system.l2c.ReadExReq_misses::cpu.data 118859 # number of ReadExReq misses
58system.l2c.ReadExReq_misses::total 118859 # number of ReadExReq misses
59system.l2c.demand_misses::cpu.inst 14936 # number of demand (read+write) misses
60system.l2c.demand_misses::cpu.data 1063552 # number of demand (read+write) misses
61system.l2c.demand_misses::total 1078488 # number of demand (read+write) misses
62system.l2c.overall_misses::cpu.inst 14936 # number of overall misses
63system.l2c.overall_misses::cpu.data 1063552 # number of overall misses
64system.l2c.overall_misses::total 1078488 # number of overall misses
65system.l2c.ReadReq_accesses::cpu.inst 920203 # number of ReadReq accesses(hits+misses)
66system.l2c.ReadReq_accesses::cpu.data 1738821 # number of ReadReq accesses(hits+misses)
67system.l2c.ReadReq_accesses::total 2659024 # number of ReadReq accesses(hits+misses)
68system.l2c.Writeback_accesses::writebacks 825291 # number of Writeback accesses(hits+misses)
69system.l2c.Writeback_accesses::total 825291 # number of Writeback accesses(hits+misses)
70system.l2c.UpgradeReq_accesses::cpu.data 13 # number of UpgradeReq accesses(hits+misses)
71system.l2c.UpgradeReq_accesses::total 13 # number of UpgradeReq accesses(hits+misses)
72system.l2c.ReadExReq_accesses::cpu.data 304242 # number of ReadExReq accesses(hits+misses)
73system.l2c.ReadExReq_accesses::total 304242 # number of ReadExReq accesses(hits+misses)
74system.l2c.demand_accesses::cpu.inst 920203 # number of demand (read+write) accesses
75system.l2c.demand_accesses::cpu.data 2043063 # number of demand (read+write) accesses
76system.l2c.demand_accesses::total 2963266 # number of demand (read+write) accesses
77system.l2c.overall_accesses::cpu.inst 920203 # number of overall (read+write) accesses
78system.l2c.overall_accesses::cpu.data 2043063 # number of overall (read+write) accesses
79system.l2c.overall_accesses::total 2963266 # number of overall (read+write) accesses
80system.l2c.ReadReq_miss_rate::cpu.inst 0.016231 # miss rate for ReadReq accesses
81system.l2c.ReadReq_miss_rate::cpu.data 0.543295 # miss rate for ReadReq accesses
82system.l2c.UpgradeReq_miss_rate::cpu.data 0.923077 # miss rate for UpgradeReq accesses
83system.l2c.ReadExReq_miss_rate::cpu.data 0.390673 # miss rate for ReadExReq accesses
84system.l2c.demand_miss_rate::cpu.inst 0.016231 # miss rate for demand accesses
85system.l2c.demand_miss_rate::cpu.data 0.520567 # miss rate for demand accesses
86system.l2c.overall_miss_rate::cpu.inst 0.016231 # miss rate for overall accesses
87system.l2c.overall_miss_rate::cpu.data 0.520567 # miss rate for overall accesses
88system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
89system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
90system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
91system.l2c.blocked::no_targets 0 # number of cycles access was blocked

92system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
93system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

92system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
93system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

94system.l2c.fast_writes 0 # number of fast writes performed
95system.l2c.cache_copies 0 # number of cache copies performed
96system.l2c.writebacks::writebacks 117189 # number of writebacks
97system.l2c.writebacks::total 117189 # number of writebacks
98system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
99system.iocache.replacements 41686 # number of replacements
100system.iocache.tagsinuse 1.225570 # Cycle average of tags in use
101system.iocache.total_refs 0 # Total number of references to valid blocks.
102system.iocache.sampled_refs 41702 # Sample count of references to valid blocks.
103system.iocache.avg_refs 0 # Average number of references to valid blocks.
104system.iocache.warmup_cycle 1685780659017 # Cycle when the warmup percentage was hit.
105system.iocache.occ_blocks::tsunami.ide 1.225570 # Average occupied blocks per requestor
106system.iocache.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy
107system.iocache.occ_percent::total 0.076598 # Average percentage of cache occupancy
108system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses
109system.iocache.ReadReq_misses::total 174 # number of ReadReq misses
110system.iocache.WriteReq_misses::tsunami.ide 41552 # number of WriteReq misses
111system.iocache.WriteReq_misses::total 41552 # number of WriteReq misses
112system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses
113system.iocache.demand_misses::total 41726 # number of demand (read+write) misses
114system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses
115system.iocache.overall_misses::total 41726 # number of overall misses
116system.iocache.ReadReq_accesses::tsunami.ide 174 # number of ReadReq accesses(hits+misses)
117system.iocache.ReadReq_accesses::total 174 # number of ReadReq accesses(hits+misses)
118system.iocache.WriteReq_accesses::tsunami.ide 41552 # number of WriteReq accesses(hits+misses)
119system.iocache.WriteReq_accesses::total 41552 # number of WriteReq accesses(hits+misses)
120system.iocache.demand_accesses::tsunami.ide 41726 # number of demand (read+write) accesses
121system.iocache.demand_accesses::total 41726 # number of demand (read+write) accesses
122system.iocache.overall_accesses::tsunami.ide 41726 # number of overall (read+write) accesses
123system.iocache.overall_accesses::total 41726 # number of overall (read+write) accesses
124system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses
125system.iocache.WriteReq_miss_rate::tsunami.ide 1 # miss rate for WriteReq accesses
126system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses
127system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses
128system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
129system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
130system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
131system.iocache.blocked::no_targets 0 # number of cycles access was blocked

132system.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
133system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

132system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
133system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

134system.iocache.fast_writes 0 # number of fast writes performed
135system.iocache.cache_copies 0 # number of cache copies performed
136system.iocache.writebacks::writebacks 41512 # number of writebacks
137system.iocache.writebacks::total 41512 # number of writebacks
138system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
139system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
140system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
141system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD).
142system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes.
143system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
144system.disk0.dma_write_txs 395 # Number of DMA write transactions.
145system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
146system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
147system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
148system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
149system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
150system.disk2.dma_write_txs 1 # Number of DMA write transactions.
151system.cpu.dtb.fetch_hits 0 # ITB hits
152system.cpu.dtb.fetch_misses 0 # ITB misses
153system.cpu.dtb.fetch_acv 0 # ITB acv
154system.cpu.dtb.fetch_accesses 0 # ITB accesses
155system.cpu.dtb.read_hits 9710427 # DTB read hits
156system.cpu.dtb.read_misses 10329 # DTB read misses
157system.cpu.dtb.read_acv 210 # DTB read access violations
158system.cpu.dtb.read_accesses 728856 # DTB read accesses
159system.cpu.dtb.write_hits 6352498 # DTB write hits
160system.cpu.dtb.write_misses 1142 # DTB write misses
161system.cpu.dtb.write_acv 157 # DTB write access violations
162system.cpu.dtb.write_accesses 291931 # DTB write accesses
163system.cpu.dtb.data_hits 16062925 # DTB hits
164system.cpu.dtb.data_misses 11471 # DTB misses
165system.cpu.dtb.data_acv 367 # DTB access violations
166system.cpu.dtb.data_accesses 1020787 # DTB accesses
167system.cpu.itb.fetch_hits 4974648 # ITB hits
168system.cpu.itb.fetch_misses 5006 # ITB misses
169system.cpu.itb.fetch_acv 184 # ITB acv
170system.cpu.itb.fetch_accesses 4979654 # ITB accesses
171system.cpu.itb.read_hits 0 # DTB read hits
172system.cpu.itb.read_misses 0 # DTB read misses
173system.cpu.itb.read_acv 0 # DTB read access violations
174system.cpu.itb.read_accesses 0 # DTB read accesses
175system.cpu.itb.write_hits 0 # DTB write hits
176system.cpu.itb.write_misses 0 # DTB write misses
177system.cpu.itb.write_acv 0 # DTB write access violations
178system.cpu.itb.write_accesses 0 # DTB write accesses
179system.cpu.itb.data_hits 0 # DTB hits
180system.cpu.itb.data_misses 0 # DTB misses
181system.cpu.itb.data_acv 0 # DTB access violations
182system.cpu.itb.data_accesses 0 # DTB accesses
183system.cpu.numCycles 3658664408 # number of cpu cycles simulated
184system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
185system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
186system.cpu.committedInsts 60038305 # Number of instructions committed
187system.cpu.committedOps 60038305 # Number of ops (including micro ops) committed
188system.cpu.num_int_alu_accesses 55913521 # Number of integer alu accesses
189system.cpu.num_fp_alu_accesses 324460 # Number of float alu accesses
190system.cpu.num_func_calls 1484182 # number of times a function call or return occured
191system.cpu.num_conditional_control_insts 7110746 # number of instructions that are conditional controls
192system.cpu.num_int_insts 55913521 # number of integer instructions
193system.cpu.num_fp_insts 324460 # number of float instructions
194system.cpu.num_int_register_reads 76953934 # number of times the integer registers were read
195system.cpu.num_int_register_writes 41740225 # number of times the integer registers were written
196system.cpu.num_fp_register_reads 163642 # number of times the floating registers were read
197system.cpu.num_fp_register_writes 166520 # number of times the floating registers were written
198system.cpu.num_mem_refs 16115709 # number of memory refs
199system.cpu.num_load_insts 9747513 # Number of load instructions
200system.cpu.num_store_insts 6368196 # Number of store instructions
201system.cpu.num_idle_cycles 3598608979.180807 # Number of idle cycles
202system.cpu.num_busy_cycles 60055428.819193 # Number of busy cycles
203system.cpu.not_idle_fraction 0.016415 # Percentage of non-idle cycles
204system.cpu.idle_fraction 0.983585 # Percentage of idle cycles
205system.cpu.kern.inst.arm 0 # number of arm instructions executed
206system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
207system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed
208system.cpu.kern.ipl_count::0 74830 40.99% 40.99% # number of times we switched to this ipl
209system.cpu.kern.ipl_count::21 243 0.13% 41.12% # number of times we switched to this ipl
210system.cpu.kern.ipl_count::22 1866 1.02% 42.14% # number of times we switched to this ipl
211system.cpu.kern.ipl_count::31 105623 57.86% 100.00% # number of times we switched to this ipl
212system.cpu.kern.ipl_count::total 182562 # number of times we switched to this ipl
213system.cpu.kern.ipl_good::0 73463 49.29% 49.29% # number of times we switched to this ipl from a different ipl
214system.cpu.kern.ipl_good::21 243 0.16% 49.46% # number of times we switched to this ipl from a different ipl
215system.cpu.kern.ipl_good::22 1866 1.25% 50.71% # number of times we switched to this ipl from a different ipl
216system.cpu.kern.ipl_good::31 73463 49.29% 100.00% # number of times we switched to this ipl from a different ipl
217system.cpu.kern.ipl_good::total 149035 # number of times we switched to this ipl from a different ipl
218system.cpu.kern.ipl_ticks::0 1811927407500 99.05% 99.05% # number of cycles we spent at this ipl
219system.cpu.kern.ipl_ticks::21 20110000 0.00% 99.05% # number of cycles we spent at this ipl
220system.cpu.kern.ipl_ticks::22 80238000 0.00% 99.05% # number of cycles we spent at this ipl
221system.cpu.kern.ipl_ticks::31 17304295000 0.95% 100.00% # number of cycles we spent at this ipl
222system.cpu.kern.ipl_ticks::total 1829332050500 # number of cycles we spent at this ipl
223system.cpu.kern.ipl_used::0 0.981732 # fraction of swpipl calls that actually changed the ipl
224system.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
225system.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
226system.cpu.kern.ipl_used::31 0.695521 # fraction of swpipl calls that actually changed the ipl
227system.cpu.kern.syscall::2 8 2.45% 2.45% # number of syscalls executed
228system.cpu.kern.syscall::3 30 9.20% 11.66% # number of syscalls executed
229system.cpu.kern.syscall::4 4 1.23% 12.88% # number of syscalls executed
230system.cpu.kern.syscall::6 42 12.88% 25.77% # number of syscalls executed
231system.cpu.kern.syscall::12 1 0.31% 26.07% # number of syscalls executed
232system.cpu.kern.syscall::15 1 0.31% 26.38% # number of syscalls executed
233system.cpu.kern.syscall::17 15 4.60% 30.98% # number of syscalls executed
234system.cpu.kern.syscall::19 10 3.07% 34.05% # number of syscalls executed
235system.cpu.kern.syscall::20 6 1.84% 35.89% # number of syscalls executed
236system.cpu.kern.syscall::23 4 1.23% 37.12% # number of syscalls executed
237system.cpu.kern.syscall::24 6 1.84% 38.96% # number of syscalls executed
238system.cpu.kern.syscall::33 11 3.37% 42.33% # number of syscalls executed
239system.cpu.kern.syscall::41 2 0.61% 42.94% # number of syscalls executed
240system.cpu.kern.syscall::45 54 16.56% 59.51% # number of syscalls executed
241system.cpu.kern.syscall::47 6 1.84% 61.35% # number of syscalls executed
242system.cpu.kern.syscall::48 10 3.07% 64.42% # number of syscalls executed
243system.cpu.kern.syscall::54 10 3.07% 67.48% # number of syscalls executed
244system.cpu.kern.syscall::58 1 0.31% 67.79% # number of syscalls executed
245system.cpu.kern.syscall::59 7 2.15% 69.94% # number of syscalls executed
246system.cpu.kern.syscall::71 54 16.56% 86.50% # number of syscalls executed
247system.cpu.kern.syscall::73 3 0.92% 87.42% # number of syscalls executed
248system.cpu.kern.syscall::74 16 4.91% 92.33% # number of syscalls executed
249system.cpu.kern.syscall::87 1 0.31% 92.64% # number of syscalls executed
250system.cpu.kern.syscall::90 3 0.92% 93.56% # number of syscalls executed
251system.cpu.kern.syscall::92 9 2.76% 96.32% # number of syscalls executed
252system.cpu.kern.syscall::97 2 0.61% 96.93% # number of syscalls executed
253system.cpu.kern.syscall::98 2 0.61% 97.55% # number of syscalls executed
254system.cpu.kern.syscall::132 4 1.23% 98.77% # number of syscalls executed
255system.cpu.kern.syscall::144 2 0.61% 99.39% # number of syscalls executed
256system.cpu.kern.syscall::147 2 0.61% 100.00% # number of syscalls executed
257system.cpu.kern.syscall::total 326 # number of syscalls executed
258system.cpu.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
259system.cpu.kern.callpal::wrmces 1 0.00% 0.00% # number of callpals executed
260system.cpu.kern.callpal::wrfen 1 0.00% 0.00% # number of callpals executed
261system.cpu.kern.callpal::wrvptptr 1 0.00% 0.00% # number of callpals executed
262system.cpu.kern.callpal::swpctx 4177 2.17% 2.18% # number of callpals executed
263system.cpu.kern.callpal::tbi 54 0.03% 2.20% # number of callpals executed
264system.cpu.kern.callpal::wrent 7 0.00% 2.21% # number of callpals executed
265system.cpu.kern.callpal::swpipl 175249 91.19% 93.40% # number of callpals executed
266system.cpu.kern.callpal::rdps 6771 3.52% 96.92% # number of callpals executed
267system.cpu.kern.callpal::wrkgp 1 0.00% 96.92% # number of callpals executed
268system.cpu.kern.callpal::wrusp 7 0.00% 96.92% # number of callpals executed
269system.cpu.kern.callpal::rdusp 9 0.00% 96.93% # number of callpals executed
270system.cpu.kern.callpal::whami 2 0.00% 96.93% # number of callpals executed
271system.cpu.kern.callpal::rti 5203 2.71% 99.64% # number of callpals executed
272system.cpu.kern.callpal::callsys 515 0.27% 99.91% # number of callpals executed
273system.cpu.kern.callpal::imb 181 0.09% 100.00% # number of callpals executed
274system.cpu.kern.callpal::total 192180 # number of callpals executed
275system.cpu.kern.mode_switch::kernel 5949 # number of protection mode switches
276system.cpu.kern.mode_switch::user 1738 # number of protection mode switches
277system.cpu.kern.mode_switch::idle 2097 # number of protection mode switches
278system.cpu.kern.mode_good::kernel 1909
279system.cpu.kern.mode_good::user 1738
280system.cpu.kern.mode_good::idle 171
281system.cpu.kern.mode_switch_good::kernel 0.320894 # fraction of useful protection mode switches
282system.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
283system.cpu.kern.mode_switch_good::idle 0.081545 # fraction of useful protection mode switches
284system.cpu.kern.mode_switch_good::total 1.402439 # fraction of useful protection mode switches
285system.cpu.kern.mode_ticks::kernel 26834202500 1.47% 1.47% # number of ticks spent at the given mode
286system.cpu.kern.mode_ticks::user 1465074000 0.08% 1.55% # number of ticks spent at the given mode
287system.cpu.kern.mode_ticks::idle 1801032773000 98.45% 100.00% # number of ticks spent at the given mode
288system.cpu.kern.swap_context 4178 # number of times the context was actually changed
289system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
290system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
291system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
292system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
293system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU

294system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post

294system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post

295system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
296system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU

297system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post

297system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post

298system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
299system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU

300system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post

300system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post

301system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
302system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU

303system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post

303system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post

304system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
305system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU

306system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post

306system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post

307system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
308system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU

309system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post

309system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post

310system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
311system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU

312system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post

312system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post

313system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
314system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU

315system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post

315system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post

316system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR

317system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post

317system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post

318system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
319system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
320system.cpu.icache.replacements 919594 # number of replacements
321system.cpu.icache.tagsinuse 511.215243 # Cycle average of tags in use
322system.cpu.icache.total_refs 59129922 # Total number of references to valid blocks.
323system.cpu.icache.sampled_refs 920106 # Sample count of references to valid blocks.
324system.cpu.icache.avg_refs 64.264250 # Average number of references to valid blocks.
325system.cpu.icache.warmup_cycle 9686972500 # Cycle when the warmup percentage was hit.
326system.cpu.icache.occ_blocks::cpu.inst 511.215243 # Average occupied blocks per requestor
327system.cpu.icache.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy
328system.cpu.icache.occ_percent::total 0.998467 # Average percentage of cache occupancy
329system.cpu.icache.ReadReq_hits::cpu.inst 59129922 # number of ReadReq hits
330system.cpu.icache.ReadReq_hits::total 59129922 # number of ReadReq hits
331system.cpu.icache.demand_hits::cpu.inst 59129922 # number of demand (read+write) hits
332system.cpu.icache.demand_hits::total 59129922 # number of demand (read+write) hits
333system.cpu.icache.overall_hits::cpu.inst 59129922 # number of overall hits
334system.cpu.icache.overall_hits::total 59129922 # number of overall hits
335system.cpu.icache.ReadReq_misses::cpu.inst 920221 # number of ReadReq misses
336system.cpu.icache.ReadReq_misses::total 920221 # number of ReadReq misses
337system.cpu.icache.demand_misses::cpu.inst 920221 # number of demand (read+write) misses
338system.cpu.icache.demand_misses::total 920221 # number of demand (read+write) misses
339system.cpu.icache.overall_misses::cpu.inst 920221 # number of overall misses
340system.cpu.icache.overall_misses::total 920221 # number of overall misses
341system.cpu.icache.ReadReq_accesses::cpu.inst 60050143 # number of ReadReq accesses(hits+misses)
342system.cpu.icache.ReadReq_accesses::total 60050143 # number of ReadReq accesses(hits+misses)
343system.cpu.icache.demand_accesses::cpu.inst 60050143 # number of demand (read+write) accesses
344system.cpu.icache.demand_accesses::total 60050143 # number of demand (read+write) accesses
345system.cpu.icache.overall_accesses::cpu.inst 60050143 # number of overall (read+write) accesses
346system.cpu.icache.overall_accesses::total 60050143 # number of overall (read+write) accesses
347system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.015324 # miss rate for ReadReq accesses
348system.cpu.icache.demand_miss_rate::cpu.inst 0.015324 # miss rate for demand accesses
349system.cpu.icache.overall_miss_rate::cpu.inst 0.015324 # miss rate for overall accesses
350system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
351system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
352system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
353system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked

354system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
355system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

354system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
355system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

356system.cpu.icache.fast_writes 0 # number of fast writes performed
357system.cpu.icache.cache_copies 0 # number of cache copies performed
358system.cpu.icache.writebacks::writebacks 108 # number of writebacks
359system.cpu.icache.writebacks::total 108 # number of writebacks
360system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
361system.cpu.dcache.replacements 2042700 # number of replacements
362system.cpu.dcache.tagsinuse 511.997802 # Cycle average of tags in use
363system.cpu.dcache.total_refs 14038433 # Total number of references to valid blocks.
364system.cpu.dcache.sampled_refs 2043212 # Sample count of references to valid blocks.
365system.cpu.dcache.avg_refs 6.870767 # Average number of references to valid blocks.
366system.cpu.dcache.warmup_cycle 10840000 # Cycle when the warmup percentage was hit.
367system.cpu.dcache.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor
368system.cpu.dcache.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy
369system.cpu.dcache.occ_percent::total 0.999996 # Average percentage of cache occupancy
370system.cpu.dcache.ReadReq_hits::cpu.data 7807782 # number of ReadReq hits
371system.cpu.dcache.ReadReq_hits::total 7807782 # number of ReadReq hits
372system.cpu.dcache.WriteReq_hits::cpu.data 5848212 # number of WriteReq hits
373system.cpu.dcache.WriteReq_hits::total 5848212 # number of WriteReq hits
374system.cpu.dcache.LoadLockedReq_hits::cpu.data 183141 # number of LoadLockedReq hits
375system.cpu.dcache.LoadLockedReq_hits::total 183141 # number of LoadLockedReq hits
376system.cpu.dcache.StoreCondReq_hits::cpu.data 199282 # number of StoreCondReq hits
377system.cpu.dcache.StoreCondReq_hits::total 199282 # number of StoreCondReq hits
378system.cpu.dcache.demand_hits::cpu.data 13655994 # number of demand (read+write) hits
379system.cpu.dcache.demand_hits::total 13655994 # number of demand (read+write) hits
380system.cpu.dcache.overall_hits::cpu.data 13655994 # number of overall hits
381system.cpu.dcache.overall_hits::total 13655994 # number of overall hits
382system.cpu.dcache.ReadReq_misses::cpu.data 1721705 # number of ReadReq misses
383system.cpu.dcache.ReadReq_misses::total 1721705 # number of ReadReq misses
384system.cpu.dcache.WriteReq_misses::cpu.data 304362 # number of WriteReq misses
385system.cpu.dcache.WriteReq_misses::total 304362 # number of WriteReq misses
386system.cpu.dcache.LoadLockedReq_misses::cpu.data 17162 # number of LoadLockedReq misses
387system.cpu.dcache.LoadLockedReq_misses::total 17162 # number of LoadLockedReq misses
388system.cpu.dcache.demand_misses::cpu.data 2026067 # number of demand (read+write) misses
389system.cpu.dcache.demand_misses::total 2026067 # number of demand (read+write) misses
390system.cpu.dcache.overall_misses::cpu.data 2026067 # number of overall misses
391system.cpu.dcache.overall_misses::total 2026067 # number of overall misses
392system.cpu.dcache.ReadReq_accesses::cpu.data 9529487 # number of ReadReq accesses(hits+misses)
393system.cpu.dcache.ReadReq_accesses::total 9529487 # number of ReadReq accesses(hits+misses)
394system.cpu.dcache.WriteReq_accesses::cpu.data 6152574 # number of WriteReq accesses(hits+misses)
395system.cpu.dcache.WriteReq_accesses::total 6152574 # number of WriteReq accesses(hits+misses)
396system.cpu.dcache.LoadLockedReq_accesses::cpu.data 200303 # number of LoadLockedReq accesses(hits+misses)
397system.cpu.dcache.LoadLockedReq_accesses::total 200303 # number of LoadLockedReq accesses(hits+misses)
398system.cpu.dcache.StoreCondReq_accesses::cpu.data 199282 # number of StoreCondReq accesses(hits+misses)
399system.cpu.dcache.StoreCondReq_accesses::total 199282 # number of StoreCondReq accesses(hits+misses)
400system.cpu.dcache.demand_accesses::cpu.data 15682061 # number of demand (read+write) accesses
401system.cpu.dcache.demand_accesses::total 15682061 # number of demand (read+write) accesses
402system.cpu.dcache.overall_accesses::cpu.data 15682061 # number of overall (read+write) accesses
403system.cpu.dcache.overall_accesses::total 15682061 # number of overall (read+write) accesses
404system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.180671 # miss rate for ReadReq accesses
405system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.049469 # miss rate for WriteReq accesses
406system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.085680 # miss rate for LoadLockedReq accesses
407system.cpu.dcache.demand_miss_rate::cpu.data 0.129196 # miss rate for demand accesses
408system.cpu.dcache.overall_miss_rate::cpu.data 0.129196 # miss rate for overall accesses
409system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
410system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
411system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
412system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked

413system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
414system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

413system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
414system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked