stats.txt (11860:67dee11badea) | stats.txt (11955:1170d039b31e) |
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1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.037944 # Number of seconds simulated 4sim_ticks 37944194500 # Number of ticks simulated 5final_tick 37944194500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 220724 # Simulator instruction rate (inst/s) 8host_op_rate 282280 # Simulator op (including micro ops) rate (op/s) --- 416 unchanged lines hidden (view full) --- 425system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 426system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 427system.cpu.itb.read_accesses 0 # DTB read accesses 428system.cpu.itb.write_accesses 0 # DTB write accesses 429system.cpu.itb.inst_accesses 0 # ITB inst accesses 430system.cpu.itb.hits 0 # DTB hits 431system.cpu.itb.misses 0 # DTB misses 432system.cpu.itb.accesses 0 # DTB accesses | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.037944 # Number of seconds simulated 4sim_ticks 37944194500 # Number of ticks simulated 5final_tick 37944194500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 220724 # Simulator instruction rate (inst/s) 8host_op_rate 282280 # Simulator op (including micro ops) rate (op/s) --- 416 unchanged lines hidden (view full) --- 425system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 426system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 427system.cpu.itb.read_accesses 0 # DTB read accesses 428system.cpu.itb.write_accesses 0 # DTB write accesses 429system.cpu.itb.inst_accesses 0 # ITB inst accesses 430system.cpu.itb.hits 0 # DTB hits 431system.cpu.itb.misses 0 # DTB misses 432system.cpu.itb.accesses 0 # DTB accesses |
433system.cpu.workload.num_syscalls 1946 # Number of system calls | 433system.cpu.workload.numSyscalls 1946 # Number of system calls |
434system.cpu.pwrStateResidencyTicks::ON 37944194500 # Cumulative time (in ticks) in various power states 435system.cpu.numCycles 75888390 # number of cpu cycles simulated 436system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 437system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 438system.cpu.fetch.icacheStallCycles 5573583 # Number of cycles fetch is stalled on an Icache miss 439system.cpu.fetch.Insts 87028801 # Number of instructions fetch has processed 440system.cpu.fetch.Branches 17059712 # Number of branches that fetch encountered 441system.cpu.fetch.predictedBranches 9401093 # Number of branches that fetch has predicted taken --- 825 unchanged lines hidden --- | 434system.cpu.pwrStateResidencyTicks::ON 37944194500 # Cumulative time (in ticks) in various power states 435system.cpu.numCycles 75888390 # number of cpu cycles simulated 436system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 437system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 438system.cpu.fetch.icacheStallCycles 5573583 # Number of cycles fetch is stalled on an Icache miss 439system.cpu.fetch.Insts 87028801 # Number of instructions fetch has processed 440system.cpu.fetch.Branches 17059712 # Number of branches that fetch encountered 441system.cpu.fetch.predictedBranches 9401093 # Number of branches that fetch has predicted taken --- 825 unchanged lines hidden --- |