| stats.txt (11680:b4d943429dc6) | stats.txt (11687:b3d5f0e9e258) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.037982 # Number of seconds simulated 4sim_ticks 37982056000 # Number of ticks simulated 5final_tick 37982056000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.037982 # Number of seconds simulated 4sim_ticks 37982056000 # Number of ticks simulated 5final_tick 37982056000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 105525 # Simulator instruction rate (inst/s) 8host_op_rate 134954 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 56525025 # Simulator tick rate (ticks/s) 10host_mem_usage 282344 # Number of bytes of host memory used 11host_seconds 671.95 # Real time elapsed on the host | 7host_inst_rate 220867 # Simulator instruction rate (inst/s) 8host_op_rate 282464 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 118308818 # Simulator tick rate (ticks/s) 10host_mem_usage 284316 # Number of bytes of host memory used 11host_seconds 321.04 # Real time elapsed on the host |
| 12sim_insts 70907652 # Number of instructions simulated 13sim_ops 90682607 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 37982056000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 2372544 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 5696640 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.l2cache.prefetcher 6178368 # Number of bytes read from this memory --- 502 unchanged lines hidden (view full) --- 522system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available 523system.cpu.iq.fu_full::IntAlu 6736684 22.63% 22.63% # attempts to use FU when none available 524system.cpu.iq.fu_full::IntMult 37 0.00% 22.63% # attempts to use FU when none available 525system.cpu.iq.fu_full::IntDiv 0 0.00% 22.63% # attempts to use FU when none available 526system.cpu.iq.fu_full::FloatAdd 0 0.00% 22.63% # attempts to use FU when none available 527system.cpu.iq.fu_full::FloatCmp 0 0.00% 22.63% # attempts to use FU when none available 528system.cpu.iq.fu_full::FloatCvt 0 0.00% 22.63% # attempts to use FU when none available 529system.cpu.iq.fu_full::FloatMult 0 0.00% 22.63% # attempts to use FU when none available | 12sim_insts 70907652 # Number of instructions simulated 13sim_ops 90682607 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 37982056000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 2372544 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 5696640 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.l2cache.prefetcher 6178368 # Number of bytes read from this memory --- 502 unchanged lines hidden (view full) --- 522system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available 523system.cpu.iq.fu_full::IntAlu 6736684 22.63% 22.63% # attempts to use FU when none available 524system.cpu.iq.fu_full::IntMult 37 0.00% 22.63% # attempts to use FU when none available 525system.cpu.iq.fu_full::IntDiv 0 0.00% 22.63% # attempts to use FU when none available 526system.cpu.iq.fu_full::FloatAdd 0 0.00% 22.63% # attempts to use FU when none available 527system.cpu.iq.fu_full::FloatCmp 0 0.00% 22.63% # attempts to use FU when none available 528system.cpu.iq.fu_full::FloatCvt 0 0.00% 22.63% # attempts to use FU when none available 529system.cpu.iq.fu_full::FloatMult 0 0.00% 22.63% # attempts to use FU when none available |
| 530system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 22.63% # attempts to use FU when none available |
|
| 530system.cpu.iq.fu_full::FloatDiv 0 0.00% 22.63% # attempts to use FU when none available | 531system.cpu.iq.fu_full::FloatDiv 0 0.00% 22.63% # attempts to use FU when none available |
| 532system.cpu.iq.fu_full::FloatMisc 0 0.00% 22.63% # attempts to use FU when none available |
|
| 531system.cpu.iq.fu_full::FloatSqrt 0 0.00% 22.63% # attempts to use FU when none available 532system.cpu.iq.fu_full::SimdAdd 0 0.00% 22.63% # attempts to use FU when none available 533system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 22.63% # attempts to use FU when none available 534system.cpu.iq.fu_full::SimdAlu 0 0.00% 22.63% # attempts to use FU when none available 535system.cpu.iq.fu_full::SimdCmp 0 0.00% 22.63% # attempts to use FU when none available 536system.cpu.iq.fu_full::SimdCvt 0 0.00% 22.63% # attempts to use FU when none available 537system.cpu.iq.fu_full::SimdMisc 0 0.00% 22.63% # attempts to use FU when none available 538system.cpu.iq.fu_full::SimdMult 0 0.00% 22.63% # attempts to use FU when none available --- 5 unchanged lines hidden (view full) --- 544system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 22.63% # attempts to use FU when none available 545system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 22.63% # attempts to use FU when none available 546system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 22.63% # attempts to use FU when none available 547system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 22.63% # attempts to use FU when none available 548system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 22.63% # attempts to use FU when none available 549system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 22.63% # attempts to use FU when none available 550system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 22.63% # attempts to use FU when none available 551system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 22.63% # attempts to use FU when none available | 533system.cpu.iq.fu_full::FloatSqrt 0 0.00% 22.63% # attempts to use FU when none available 534system.cpu.iq.fu_full::SimdAdd 0 0.00% 22.63% # attempts to use FU when none available 535system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 22.63% # attempts to use FU when none available 536system.cpu.iq.fu_full::SimdAlu 0 0.00% 22.63% # attempts to use FU when none available 537system.cpu.iq.fu_full::SimdCmp 0 0.00% 22.63% # attempts to use FU when none available 538system.cpu.iq.fu_full::SimdCvt 0 0.00% 22.63% # attempts to use FU when none available 539system.cpu.iq.fu_full::SimdMisc 0 0.00% 22.63% # attempts to use FU when none available 540system.cpu.iq.fu_full::SimdMult 0 0.00% 22.63% # attempts to use FU when none available --- 5 unchanged lines hidden (view full) --- 546system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 22.63% # attempts to use FU when none available 547system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 22.63% # attempts to use FU when none available 548system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 22.63% # attempts to use FU when none available 549system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 22.63% # attempts to use FU when none available 550system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 22.63% # attempts to use FU when none available 551system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 22.63% # attempts to use FU when none available 552system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 22.63% # attempts to use FU when none available 553system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 22.63% # attempts to use FU when none available |
| 552system.cpu.iq.fu_full::MemRead 11088474 37.25% 59.89% # attempts to use FU when none available 553system.cpu.iq.fu_full::MemWrite 11940322 40.11% 100.00% # attempts to use FU when none available | 554system.cpu.iq.fu_full::MemRead 11088448 37.25% 59.89% # attempts to use FU when none available 555system.cpu.iq.fu_full::MemWrite 11940306 40.11% 100.00% # attempts to use FU when none available 556system.cpu.iq.fu_full::FloatMemRead 30 0.00% 100.00% # attempts to use FU when none available 557system.cpu.iq.fu_full::FloatMemWrite 21 0.00% 100.00% # attempts to use FU when none available |
| 554system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 555system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 556system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued 557system.cpu.iq.FU_type_0::IntAlu 49305598 52.18% 52.18% # Type of FU issued 558system.cpu.iq.FU_type_0::IntMult 86530 0.09% 52.28% # Type of FU issued 559system.cpu.iq.FU_type_0::IntDiv 0 0.00% 52.28% # Type of FU issued 560system.cpu.iq.FU_type_0::FloatAdd 32 0.00% 52.28% # Type of FU issued 561system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 52.28% # Type of FU issued 562system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 52.28% # Type of FU issued 563system.cpu.iq.FU_type_0::FloatMult 0 0.00% 52.28% # Type of FU issued | 558system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 559system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 560system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued 561system.cpu.iq.FU_type_0::IntAlu 49305598 52.18% 52.18% # Type of FU issued 562system.cpu.iq.FU_type_0::IntMult 86530 0.09% 52.28% # Type of FU issued 563system.cpu.iq.FU_type_0::IntDiv 0 0.00% 52.28% # Type of FU issued 564system.cpu.iq.FU_type_0::FloatAdd 32 0.00% 52.28% # Type of FU issued 565system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 52.28% # Type of FU issued 566system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 52.28% # Type of FU issued 567system.cpu.iq.FU_type_0::FloatMult 0 0.00% 52.28% # Type of FU issued |
| 568system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 52.28% # Type of FU issued |
|
| 564system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 52.28% # Type of FU issued | 569system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 52.28% # Type of FU issued |
| 570system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 52.28% # Type of FU issued |
|
| 565system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 52.28% # Type of FU issued 566system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 52.28% # Type of FU issued 567system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 52.28% # Type of FU issued 568system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 52.28% # Type of FU issued 569system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 52.28% # Type of FU issued 570system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 52.28% # Type of FU issued 571system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 52.28% # Type of FU issued 572system.cpu.iq.FU_type_0::SimdMult 0 0.00% 52.28% # Type of FU issued --- 5 unchanged lines hidden (view full) --- 578system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 52.28% # Type of FU issued 579system.cpu.iq.FU_type_0::SimdFloatCmp 11 0.00% 52.28% # Type of FU issued 580system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 52.28% # Type of FU issued 581system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 52.28% # Type of FU issued 582system.cpu.iq.FU_type_0::SimdFloatMisc 18 0.00% 52.28% # Type of FU issued 583system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 52.28% # Type of FU issued 584system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 52.28% # Type of FU issued 585system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 52.28% # Type of FU issued | 571system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 52.28% # Type of FU issued 572system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 52.28% # Type of FU issued 573system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 52.28% # Type of FU issued 574system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 52.28% # Type of FU issued 575system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 52.28% # Type of FU issued 576system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 52.28% # Type of FU issued 577system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 52.28% # Type of FU issued 578system.cpu.iq.FU_type_0::SimdMult 0 0.00% 52.28% # Type of FU issued --- 5 unchanged lines hidden (view full) --- 584system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 52.28% # Type of FU issued 585system.cpu.iq.FU_type_0::SimdFloatCmp 11 0.00% 52.28% # Type of FU issued 586system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 52.28% # Type of FU issued 587system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 52.28% # Type of FU issued 588system.cpu.iq.FU_type_0::SimdFloatMisc 18 0.00% 52.28% # Type of FU issued 589system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 52.28% # Type of FU issued 590system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 52.28% # Type of FU issued 591system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 52.28% # Type of FU issued |
| 586system.cpu.iq.FU_type_0::MemRead 23958877 25.36% 77.63% # Type of FU issued 587system.cpu.iq.FU_type_0::MemWrite 21133721 22.37% 100.00% # Type of FU issued | 592system.cpu.iq.FU_type_0::MemRead 23958815 25.36% 77.63% # Type of FU issued 593system.cpu.iq.FU_type_0::MemWrite 21133689 22.37% 100.00% # Type of FU issued 594system.cpu.iq.FU_type_0::FloatMemRead 62 0.00% 100.00% # Type of FU issued 595system.cpu.iq.FU_type_0::FloatMemWrite 32 0.00% 100.00% # Type of FU issued |
| 588system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 589system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued 590system.cpu.iq.FU_type_0::total 94484787 # Type of FU issued 591system.cpu.iq.rate 1.243808 # Inst issue rate | 596system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 597system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued 598system.cpu.iq.FU_type_0::total 94484787 # Type of FU issued 599system.cpu.iq.rate 1.243808 # Inst issue rate |
| 592system.cpu.iq.fu_busy_cnt 29765517 # FU busy when requested | 600system.cpu.iq.fu_busy_cnt 29765526 # FU busy when requested |
| 593system.cpu.iq.fu_busy_rate 0.315030 # FU busy rate (busy events/executed inst) 594system.cpu.iq.int_inst_queue_reads 291599265 # Number of integer instruction queue reads 595system.cpu.iq.int_inst_queue_writes 104199326 # Number of integer instruction queue writes 596system.cpu.iq.int_inst_queue_wakeup_accesses 93203450 # Number of integer instruction queue wakeup accesses | 601system.cpu.iq.fu_busy_rate 0.315030 # FU busy rate (busy events/executed inst) 602system.cpu.iq.int_inst_queue_reads 291599265 # Number of integer instruction queue reads 603system.cpu.iq.int_inst_queue_writes 104199326 # Number of integer instruction queue writes 604system.cpu.iq.int_inst_queue_wakeup_accesses 93203450 # Number of integer instruction queue wakeup accesses |
| 597system.cpu.iq.fp_inst_queue_reads 326 # Number of floating instruction queue reads | 605system.cpu.iq.fp_inst_queue_reads 335 # Number of floating instruction queue reads |
| 598system.cpu.iq.fp_inst_queue_writes 598 # Number of floating instruction queue writes 599system.cpu.iq.fp_inst_queue_wakeup_accesses 92 # Number of floating instruction queue wakeup accesses 600system.cpu.iq.int_alu_accesses 124250121 # Number of integer alu accesses | 606system.cpu.iq.fp_inst_queue_writes 598 # Number of floating instruction queue writes 607system.cpu.iq.fp_inst_queue_wakeup_accesses 92 # Number of floating instruction queue wakeup accesses 608system.cpu.iq.int_alu_accesses 124250121 # Number of integer alu accesses |
| 601system.cpu.iq.fp_alu_accesses 183 # Number of floating point alu accesses | 609system.cpu.iq.fp_alu_accesses 192 # Number of floating point alu accesses |
| 602system.cpu.iew.lsq.thread0.forwLoads 1368397 # Number of loads that had data forwarded from stores 603system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address 604system.cpu.iew.lsq.thread0.squashedLoads 1289383 # Number of loads squashed 605system.cpu.iew.lsq.thread0.ignoredResponses 2091 # Number of memory responses ignored because the instruction is squashed 606system.cpu.iew.lsq.thread0.memOrderViolation 11973 # Number of memory ordering violations 607system.cpu.iew.lsq.thread0.squashedStores 1204762 # Number of stores squashed 608system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 609system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding --- 62 unchanged lines hidden (view full) --- 672system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 673system.cpu.commit.op_class_0::IntAlu 47186033 52.03% 52.03% # Class of committed instruction 674system.cpu.commit.op_class_0::IntMult 80119 0.09% 52.12% # Class of committed instruction 675system.cpu.commit.op_class_0::IntDiv 0 0.00% 52.12% # Class of committed instruction 676system.cpu.commit.op_class_0::FloatAdd 0 0.00% 52.12% # Class of committed instruction 677system.cpu.commit.op_class_0::FloatCmp 0 0.00% 52.12% # Class of committed instruction 678system.cpu.commit.op_class_0::FloatCvt 0 0.00% 52.12% # Class of committed instruction 679system.cpu.commit.op_class_0::FloatMult 0 0.00% 52.12% # Class of committed instruction | 610system.cpu.iew.lsq.thread0.forwLoads 1368397 # Number of loads that had data forwarded from stores 611system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address 612system.cpu.iew.lsq.thread0.squashedLoads 1289383 # Number of loads squashed 613system.cpu.iew.lsq.thread0.ignoredResponses 2091 # Number of memory responses ignored because the instruction is squashed 614system.cpu.iew.lsq.thread0.memOrderViolation 11973 # Number of memory ordering violations 615system.cpu.iew.lsq.thread0.squashedStores 1204762 # Number of stores squashed 616system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 617system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding --- 62 unchanged lines hidden (view full) --- 680system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 681system.cpu.commit.op_class_0::IntAlu 47186033 52.03% 52.03% # Class of committed instruction 682system.cpu.commit.op_class_0::IntMult 80119 0.09% 52.12% # Class of committed instruction 683system.cpu.commit.op_class_0::IntDiv 0 0.00% 52.12% # Class of committed instruction 684system.cpu.commit.op_class_0::FloatAdd 0 0.00% 52.12% # Class of committed instruction 685system.cpu.commit.op_class_0::FloatCmp 0 0.00% 52.12% # Class of committed instruction 686system.cpu.commit.op_class_0::FloatCvt 0 0.00% 52.12% # Class of committed instruction 687system.cpu.commit.op_class_0::FloatMult 0 0.00% 52.12% # Class of committed instruction |
| 688system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 52.12% # Class of committed instruction |
|
| 680system.cpu.commit.op_class_0::FloatDiv 0 0.00% 52.12% # Class of committed instruction | 689system.cpu.commit.op_class_0::FloatDiv 0 0.00% 52.12% # Class of committed instruction |
| 690system.cpu.commit.op_class_0::FloatMisc 0 0.00% 52.12% # Class of committed instruction |
|
| 681system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 52.12% # Class of committed instruction 682system.cpu.commit.op_class_0::SimdAdd 0 0.00% 52.12% # Class of committed instruction 683system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 52.12% # Class of committed instruction 684system.cpu.commit.op_class_0::SimdAlu 0 0.00% 52.12% # Class of committed instruction 685system.cpu.commit.op_class_0::SimdCmp 0 0.00% 52.12% # Class of committed instruction 686system.cpu.commit.op_class_0::SimdCvt 0 0.00% 52.12% # Class of committed instruction 687system.cpu.commit.op_class_0::SimdMisc 0 0.00% 52.12% # Class of committed instruction 688system.cpu.commit.op_class_0::SimdMult 0 0.00% 52.12% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 694system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 52.12% # Class of committed instruction 695system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 52.12% # Class of committed instruction 696system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 52.12% # Class of committed instruction 697system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 52.12% # Class of committed instruction 698system.cpu.commit.op_class_0::SimdFloatMisc 7 0.00% 52.12% # Class of committed instruction 699system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 52.12% # Class of committed instruction 700system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 52.12% # Class of committed instruction 701system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 52.12% # Class of committed instruction | 691system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 52.12% # Class of committed instruction 692system.cpu.commit.op_class_0::SimdAdd 0 0.00% 52.12% # Class of committed instruction 693system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 52.12% # Class of committed instruction 694system.cpu.commit.op_class_0::SimdAlu 0 0.00% 52.12% # Class of committed instruction 695system.cpu.commit.op_class_0::SimdCmp 0 0.00% 52.12% # Class of committed instruction 696system.cpu.commit.op_class_0::SimdCvt 0 0.00% 52.12% # Class of committed instruction 697system.cpu.commit.op_class_0::SimdMisc 0 0.00% 52.12% # Class of committed instruction 698system.cpu.commit.op_class_0::SimdMult 0 0.00% 52.12% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 704system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 52.12% # Class of committed instruction 705system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 52.12% # Class of committed instruction 706system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 52.12% # Class of committed instruction 707system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 52.12% # Class of committed instruction 708system.cpu.commit.op_class_0::SimdFloatMisc 7 0.00% 52.12% # Class of committed instruction 709system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 52.12% # Class of committed instruction 710system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 52.12% # Class of committed instruction 711system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 52.12% # Class of committed instruction |
| 702system.cpu.commit.op_class_0::MemRead 22866262 25.21% 77.33% # Class of committed instruction 703system.cpu.commit.op_class_0::MemWrite 20555738 22.67% 100.00% # Class of committed instruction | 712system.cpu.commit.op_class_0::MemRead 22866242 25.21% 77.33% # Class of committed instruction 713system.cpu.commit.op_class_0::MemWrite 20555706 22.67% 100.00% # Class of committed instruction 714system.cpu.commit.op_class_0::FloatMemRead 20 0.00% 100.00% # Class of committed instruction 715system.cpu.commit.op_class_0::FloatMemWrite 32 0.00% 100.00% # Class of committed instruction |
| 704system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 705system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 706system.cpu.commit.op_class_0::total 90688159 # Class of committed instruction 707system.cpu.commit.bw_lim_events 3809108 # number cycles where commit BW limit reached 708system.cpu.rob.rob_reads 164062130 # The number of ROB reads 709system.cpu.rob.rob_writes 194125448 # The number of ROB writes 710system.cpu.timesIdled 54252 # Number of times that the entire CPU went into an idle state and unscheduled itself 711system.cpu.idleCycles 3694968 # Total number of cycles that the CPU has spent unscheduled due to idling --- 544 unchanged lines hidden --- | 716system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 717system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 718system.cpu.commit.op_class_0::total 90688159 # Class of committed instruction 719system.cpu.commit.bw_lim_events 3809108 # number cycles where commit BW limit reached 720system.cpu.rob.rob_reads 164062130 # The number of ROB reads 721system.cpu.rob.rob_writes 194125448 # The number of ROB writes 722system.cpu.timesIdled 54252 # Number of times that the entire CPU went into an idle state and unscheduled itself 723system.cpu.idleCycles 3694968 # Total number of cycles that the CPU has spent unscheduled due to idling --- 544 unchanged lines hidden --- |