1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.026655 # Number of seconds simulated 4sim_ticks 26655046000 # Number of ticks simulated 5final_tick 26655046000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 108502 # Simulator instruction rate (inst/s) 8host_op_rate 153979 # Simulator op (including micro ops) rate (op/s) --- 642 unchanged lines hidden (view full) --- 651system.cpu.commit.bw_lim_events 6023270 # number cycles where commit BW limit reached 652system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits 653system.cpu.rob.rob_reads 150242538 # The number of ROB reads 654system.cpu.rob.rob_writes 224871982 # The number of ROB writes 655system.cpu.timesIdled 79510 # Number of times that the entire CPU went into an idle state and unscheduled itself 656system.cpu.idleCycles 6993412 # Total number of cycles that the CPU has spent unscheduled due to idling 657system.cpu.committedInsts 70907629 # Number of Instructions Simulated 658system.cpu.committedOps 100626876 # Number of Ops (including micro ops) Simulated |
659system.cpu.cpi 0.751825 # CPI: Cycles Per Instruction 660system.cpu.cpi_total 0.751825 # CPI: Total CPI of All Threads 661system.cpu.ipc 1.330098 # IPC: Instructions Per Cycle 662system.cpu.ipc_total 1.330098 # IPC: Total IPC of All Threads 663system.cpu.int_regfile_reads 511631717 # number of integer regfile reads 664system.cpu.int_regfile_writes 103353872 # number of integer regfile writes 665system.cpu.fp_regfile_reads 846 # number of floating regfile reads 666system.cpu.fp_regfile_writes 710 # number of floating regfile writes --- 435 unchanged lines hidden --- |