1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.201717 # Number of seconds simulated
4sim_ticks 201717313500 # Number of ticks simulated
5final_tick 201717313500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1169681 # Simulator instruction rate (inst/s)
8host_op_rate 1404332 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 864148101 # Simulator tick rate (ticks/s)
10host_mem_usage 314684 # Number of bytes of host memory used
11host_seconds 233.43 # Real time elapsed on the host
12sim_insts 273037594 # Number of instructions simulated
13sim_ops 327811949 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.inst 1394641092 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.data 480709216 # Number of bytes read from this memory
18system.physmem.bytes_read::total 1875350308 # Number of bytes read from this memory
19system.physmem.bytes_inst_read::cpu.inst 1394641092 # Number of instructions bytes read from this memory
--- 10 unchanged lines hidden (view full) ---
30system.physmem.bw_read::total 9296922884 # Total read bandwidth from this memory (bytes/s)
31system.physmem.bw_inst_read::cpu.inst 6913839312 # Instruction read bandwidth from this memory (bytes/s)
32system.physmem.bw_inst_read::total 6913839312 # Instruction read bandwidth from this memory (bytes/s)
33system.physmem.bw_write::cpu.data 1983209850 # Write bandwidth from this memory (bytes/s)
34system.physmem.bw_write::total 1983209850 # Write bandwidth from this memory (bytes/s)
35system.physmem.bw_total::cpu.inst 6913839312 # Total bandwidth to/from this memory (bytes/s)
36system.physmem.bw_total::cpu.data 4366293422 # Total bandwidth to/from this memory (bytes/s)
37system.physmem.bw_total::total 11280132734 # Total bandwidth to/from this memory (bytes/s)
38system.membus.throughput 11280132734 # Throughput (bytes/s)
39system.membus.data_through_bus 2275398071 # Total data (bytes)
40system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
41system.cpu_clk_domain.clock 500 # Clock period in ticks
42system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
43system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses
44system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits
45system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses
46system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 # DTB write hits
47system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 # DTB write misses
48system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed
--- 140 unchanged lines hidden ---
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.201717 # Number of seconds simulated
4sim_ticks 201717313500 # Number of ticks simulated
5final_tick 201717313500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1169681 # Simulator instruction rate (inst/s)
8host_op_rate 1404332 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 864148101 # Simulator tick rate (ticks/s)
10host_mem_usage 314684 # Number of bytes of host memory used
11host_seconds 233.43 # Real time elapsed on the host
12sim_insts 273037594 # Number of instructions simulated
13sim_ops 327811949 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.inst 1394641092 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.data 480709216 # Number of bytes read from this memory
18system.physmem.bytes_read::total 1875350308 # Number of bytes read from this memory
19system.physmem.bytes_inst_read::cpu.inst 1394641092 # Number of instructions bytes read from this memory
--- 10 unchanged lines hidden (view full) ---
30system.physmem.bw_read::total 9296922884 # Total read bandwidth from this memory (bytes/s)
31system.physmem.bw_inst_read::cpu.inst 6913839312 # Instruction read bandwidth from this memory (bytes/s)
32system.physmem.bw_inst_read::total 6913839312 # Instruction read bandwidth from this memory (bytes/s)
33system.physmem.bw_write::cpu.data 1983209850 # Write bandwidth from this memory (bytes/s)
34system.physmem.bw_write::total 1983209850 # Write bandwidth from this memory (bytes/s)
35system.physmem.bw_total::cpu.inst 6913839312 # Total bandwidth to/from this memory (bytes/s)
36system.physmem.bw_total::cpu.data 4366293422 # Total bandwidth to/from this memory (bytes/s)
37system.physmem.bw_total::total 11280132734 # Total bandwidth to/from this memory (bytes/s)
38system.membus.throughput 11280132734 # Throughput (bytes/s)
39system.membus.data_through_bus 2275398071 # Total data (bytes)
40system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
41system.cpu_clk_domain.clock 500 # Clock period in ticks
42system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
43system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses
44system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits
45system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses
46system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 # DTB write hits
47system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 # DTB write misses
48system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed
--- 140 unchanged lines hidden ---