22c22
< memories=system.rom system.hypervisor_desc system.physmem2 system.nvram system.physmem system.partition_desc
---
> memories=system.hypervisor_desc system.nvram system.partition_desc system.physmem2 system.rom system.physmem
32d31
< physmem=system.physmem
45c44
< system_port=system.membus.port[9]
---
> system_port=system.membus.slave[0]
55,56c54,55
< master=system.iobus.port[14]
< slave=system.membus.port[2]
---
> master=system.iobus.slave[0]
> slave=system.membus.master[2]
68a68
> fastmem=false
87,88c87,88
< dcache_port=system.membus.port[11]
< icache_port=system.membus.port[10]
---
> dcache_port=system.membus.slave[2]
> icache_port=system.membus.slave[1]
111c111
< pio=system.iobus.port[15]
---
> pio=system.iobus.master[14]
127c127,128
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
128a130
> in_addr_map=true
134c136
< port=system.membus.port[7]
---
> port=system.membus.master[7]
148c150,151
< port=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.bridge.master system.disk0.pio
---
> master=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.disk0.pio
> slave=system.bridge.master
160c163,164
< port=system.t1000.iob.pio system.t1000.htod.pio system.bridge.slave system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0] system.system_port system.cpu.icache_port system.cpu.dcache_port
---
> master=system.t1000.iob.pio system.t1000.htod.pio system.bridge.slave system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0]
> slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
179c183,184
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
180a186
> in_addr_map=true
186c192
< port=system.membus.port[6]
---
> port=system.membus.master[6]
189c195,196
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
190a198
> in_addr_map=true
196c204
< port=system.membus.port[8]
---
> port=system.membus.master[8]
199c207,208
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
200a210
> in_addr_map=true
206c216
< port=system.membus.port[3]
---
> port=system.membus.master[3]
209c219,220
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
210a222
> in_addr_map=true
216c228
< port=system.membus.port[4]
---
> port=system.membus.master[4]
219c231,232
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
220a234
> in_addr_map=true
226c240
< port=system.membus.port[5]
---
> port=system.membus.master[5]
248c262
< pio=system.iobus.port[0]
---
> pio=system.iobus.master[0]
264c278
< pio=system.iobus.port[11]
---
> pio=system.iobus.master[11]
280c294
< pio=system.iobus.port[2]
---
> pio=system.iobus.master[2]
296c310
< pio=system.iobus.port[3]
---
> pio=system.iobus.master[3]
312c326
< pio=system.iobus.port[4]
---
> pio=system.iobus.master[4]
328c342
< pio=system.iobus.port[5]
---
> pio=system.iobus.master[5]
344c358
< pio=system.iobus.port[6]
---
> pio=system.iobus.master[6]
360c374
< pio=system.iobus.port[7]
---
> pio=system.iobus.master[7]
376c390
< pio=system.iobus.port[8]
---
> pio=system.iobus.master[8]
392c406
< pio=system.iobus.port[9]
---
> pio=system.iobus.master[9]
408c422
< pio=system.iobus.port[1]
---
> pio=system.iobus.master[1]
424c438
< pio=system.iobus.port[10]
---
> pio=system.iobus.master[10]
439c453
< pio=system.membus.port[1]
---
> pio=system.membus.master[1]
448c462
< pio=system.iobus.port[13]
---
> pio=system.iobus.master[13]
455c469
< pio=system.membus.port[0]
---
> pio=system.membus.master[0]
471c485
< pio=system.iobus.port[12]
---
> pio=system.iobus.master[12]